Plasma Reactor Charge Trap Separation in Flash Memory
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Solution Overview
Problem
The conventional manufacturing process of charge trap semiconductors for flash memory devices is complex and time-consuming, requiring multiple machines, which increases manufacturing time and the risk of contamination, thereby decreasing yield.
Innovation Solution
A single machine, such as a plasma reactor, is used to grow and etch the charge trap layers, with different chemistries for polymer deposition and etching, filling and exposing cell separation gaps to form separate cells without moving the semiconductor between machines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If multiple different machines are used to construct charge trap semiconductors, then the manufacturing process can complete all required steps (charge trap layer growth, organic material coating, and etching), but the manufacturing time increases and contamination risk increases
Solution Approach 1:
The patent combines multiple manufacturing functions (charge trap layer growth, organic material coating, and etching) into a single machine system. The reactor is configured to perform PECVD for charge trap layer formation, spin coating for organic material application, and etching for cell separation, all within one integrated system, eliminating the need to transfer wafers between multiple machines
Solution Approach 2:
The reactor is designed as a universal machine capable of performing multiple distinct manufacturing operations. It can switch between different process modes (PECVD, spin coating, etching) using different chemistries and process parameters, making a single machine perform the work of traditionally three separate machines
2Ease of manufacture
If multiple different machines are used to construct charge trap semiconductors, then all manufacturing steps can be completed, but the likelihood of contaminating the semiconductor wafer increases
Solution Approach 1:
By merging all manufacturing steps into one integrated reactor system, the patent eliminates intermediate transfer steps between machines. The wafer remains in the same controlled environment throughout the entire process, preventing contamination that would occur during transfers between PECVD furnace, track equipment, and etcher
Solution Approach 2:
The reactor maintains a controlled, inert atmosphere throughout all manufacturing steps. By performing all operations within this consistent controlled environment, the patent prevents external contamination from different machine environments, ensuring higher reliability and yield
3Ease of manufacture
If multiple different machines are used to construct charge trap semiconductors, then diverse manufacturing operations can be performed, but the manufacturing complexity increases
Solution Approach 1:
The patent implements a universal reactor that can perform diverse manufacturing operations (PECVD, spin coating, etching) through software-controlled process sequences. This consolidates the complexity into a single programmable system rather than multiple separate machines, simplifying the overall manufacturing architecture while maintaining operational diversity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing time, complexity, and contamination risks, improving yield and efficiency by maintaining the semiconductor in a single machine throughout the process.
Implementation Method 1
a polymer deposition is grown in a plasma reactor over a top surface of the charge trap layers so as to fill cell separation gaps
Implementation Method 2
the plasma reactor is then used to etch the polymer deposition and charge trap layers so as to expose cell separation gaps
Data Source
AI summary
During formation of a charge trap separation in a semiconductor device, a polymer deposition is formed in a reactor using a first chemistry. In a following step, a second chemistry can be used to etch the polymer deposition in the reactor. The same or similar second chemistry can be used in a second etching step to expose a first oxide layer in each of the cells of the semiconductor device and to form a flat upper surface. This additional etch step can also be performed by the reactor, thereby reducing the number of machines required in the formation process.