Plastic Bridge Chips for Semiconductor Alignment
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Solution Overview
Problem
Proximity communication between semiconductor chips faces challenges in maintaining precise alignment in x-, y-, and z-directions, especially in thermally and mechanically challenging environments, due to the need for high communication signal density and power delivery, which increases complexity and cost in packaging.
Innovation Solution
A system using injection-molded plastic packages with plastic bridge chips or pressure clips that position and align base chips, enabling proximity communication by bridging them and providing power and ground connections through metal vias, while maintaining precise z-separation and accommodating temperature excursions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If rigid chip structures are used to maintain alignment, then structural stability is improved, but alignment precision deteriorates due to thermal expansion and mechanical stress
Solution Approach 1:
The patent employs flexible interposer substrates that can elastically deform to accommodate thermal expansion and mechanical stress, maintaining alignment precision between chips while absorbing environmental variations. The flexible substrate acts as a compliant layer that flexes rather than fractures under stress, preserving the alignment of electrical connections.
Solution Approach 2:
The patent utilizes materials with matched thermal expansion coefficients and controlled elasticity parameters to compensate for thermal and mechanical variations. By carefully selecting materials whose expansion characteristics match, the system maintains alignment precision across temperature ranges without requiring rigid constraints.
2Manufacturing precision
If complex packaging structures are used to achieve precise alignment, then alignment precision is improved, but device complexity increases
Solution Approach 1:
The patent integrates multiple functions into the interposer substrate, combining alignment reference features, electrical connections, and mechanical support into a single component. The interposer serves simultaneously as a positioning reference, electrical pathway, and stress-absorbing element, reducing the number of separate packaging components needed.
Solution Approach 2:
The interposer substrate is designed to perform multiple functions: providing alignment references for chip positioning, conducting electrical signals between chips, supplying power, and absorbing thermal and mechanical stress. This multi-functional design eliminates the need for separate components for each function, simplifying the overall packaging structure.
3Productivity
If larger arrays of chips are assembled to increase communication density, then communication bandwidth is improved, but alignment difficulty increases
Solution Approach 1:
The patent divides large chip arrays into smaller modular units, each with its own interposer substrate and alignment references. This segmentation allows for easier assembly and alignment of individual modules, which can then be combined to form larger systems while maintaining overall alignment precision through standardized interfaces.
Solution Approach 2:
The patent introduces a fourth dimension (z-axis) for alignment by incorporating vertical alignment features and thickness controls in the interposer substrate. This enables precise positioning in three-dimensional space, facilitating the assembly of large chip arrays with maintained alignment accuracy across multiple dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution simplifies chip alignment and communication, reduces power dissipation, and lowers packaging complexity and cost by using plastic bridge chips or pressure clips to maintain precise alignment and facilitate reliable signal transfer between chips, even in large arrays.
Implementation Method 1
The package and the plurality of plastic bridge chips cooperate to position and align the plurality of base chips and the plurality of plastic bridge chips
Implementation Method 2
Proximity communication can be broadly defined as wireless electromagnetic communication between chips, and has been investigated by means of capacitive coupling
Implementation Method 3
the capacitively coupled signal voltage on a particular receiver pad is inversely proportional to the distance between the receiver pad and the transmitter pad located on the opposing chip
Data Source
AI summary
A system for proximity communication between semiconductor chips includes a package assembly. The package assembly includes a plurality of bridge circuits made of organic or plastic semiconductor material. A plurality of base chips are assembled to the package assembly. The package assembly positions and aligns the plurality of base chips such that the bridge circuits bridge the base chips and enable proximity communication between the base chips.