Plate-Shaped Metal Terminals Inductance Reduction

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Solution Overview

Problem

In power semiconductor modules, high wiring inductance leads to surge voltages during high-speed switching-off operations, increasing on-resistance and conduction loss, while reducing surge voltage by lengthening off-time results in larger switching losses, necessitating a reduction in inductance.

Innovation Solution

The semiconductor device incorporates a power semiconductor module design with plate-shaped metal terminals and a resin layer, where the distance between terminals is strategically increased at one end to minimize inductance by canceling mutual inductance and improving resin filling, thereby reducing inductance and preventing insulation failure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the distance between metal terminals is reduced to minimize inductance, then wiring inductance decreases, but insulation reliability deteriorates due to risk of insulation failure

Engineering Contradiction:
Improvewiring inductanceVSAvoidinsulation reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The resin layer thickness is made non-uniform, being thinner at the center where terminals face each other and thicker at the end portions. This local variation in insulation thickness provides sufficient insulation where needed (at terminal interfaces) while maintaining compact overall dimensions, thus reducing inductance without compromising insulation reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The insulation structure transitions from a uniform planar arrangement to a three-dimensional non-uniform thickness profile. By varying the resin layer thickness in the vertical dimension, the design achieves both compact terminal spacing (reducing inductance) and adequate insulation (maintaining reliability) simultaneously.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If the resin layer thickness is reduced uniformly to minimize inductance, then wiring inductance decreases, but manufacturing precision deteriorates due to difficulty in forming thin uniform layers

Engineering Contradiction:
Improvewiring inductanceVSAvoidresin layer formation precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

Instead of forming a uniformly thin resin layer throughout, the design specifies different thickness requirements for different regions: the center portion can be thin (for low inductance) while end portions are thicker (for manufacturability). This local differentiation makes the resin layer formation process more precise and reliable.

Inventive Principle:
Principle #3Local quality

3Reliability

If the distance between terminals is increased to improve insulation, then insulation reliability improves, but wiring inductance increases leading to larger surge voltages

Engineering Contradiction:
Improveinsulation reliabilityVSAvoidwiring inductance
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The resin layer is made thicker at the end portions of terminals where insulation is critical, while maintaining smaller distance at the center portion where current flow occurs. This localized insulation enhancement provides high reliability without excessive overall terminal spacing, thus avoiding large inductance increases.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10468387B2Semiconductor device having plate-shaped metal terminals facing one another
Publication Date: 2019.11.05 KK TOSHIBA
  • US10468387B2 patent drawing
  • US10468387B2 patent drawing
  • US10468387B2 patent drawing

AI summary

Provided is a semiconductor device according to an embodiment including a plate-shaped first metal terminal, a plate-shaped second metal terminal provided to face the first metal terminal, a resin layer provided between the first metal terminal and the second metal terminal, and a semiconductor chip having a first upper electrode electrically connected to the first metal terminal and a first lower electrode electrically connected to the second metal terminal, wherein a first distance between the first metal terminal and the second metal terminal at the end portion of the first metal terminal is larger than a second distance between the first metal terminal and the second metal terminal at a portion inside the end portion of the first metal terminal.