Plated Phase Change Material via Oxidized Seed Layer
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Solution Overview
Problem
Existing phase change memory devices face challenges in filling vias of high aspect ratio with phase change material, leading to short circuits and difficulty in isolating memory cells, which affects their independent operation and scalability.
Innovation Solution
A method involving patterning vias, forming a conformal conductive seed layer, electroplating phase change material, and oxidizing the seed layer edges to prevent short circuits, allowing each memory cell to operate independently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If PVD or CVD operations are used to deliver phase change material, then material can be deposited, but the material may not reach the bottom surface of high aspect ratio vias
Solution Approach 1:
The patent replaces physical vapor deposition (PVD) and chemical vapor deposition (CVD) methods with electroplating. Instead of using vapor-phase deposition mechanisms that cannot effectively fill high aspect ratio vias, the invention uses electrochemical deposition where phase change material is plated from solution onto the via walls and bottom, ensuring complete filling of high aspect ratio structures.
Solution Approach 2:
The patent changes the deposition mechanism from vapor-phase to solution-phase electroplating. This parameter change allows the phase change material to be delivered as ions in an electrolyte solution that can penetrate and fill high aspect ratio vias completely, overcoming the limitation of PVD/CVD methods where material cannot reach the bottom surface.
2Ease of manufacture
If a blanket seed layer is formed underneath all memory cells, then phase change material can be plated, but all bottom contacts may be short circuited
Solution Approach 1:
The patent divides the seed layer formation into cell-specific portions rather than a continuous blanket layer. The seed layer is formed only in the regions where phase change material plating is required (within and around the vias), segmented by dielectric material between cells. This segmentation prevents short circuits between adjacent memory cell bottom contacts while maintaining plating capability.
Solution Approach 2:
The patent introduces dielectric material as an intermediary between adjacent memory cells. This dielectric layer is formed between the vias and prevents the seed layer from creating conductive paths that would short circuit the bottom contacts of adjacent cells, while still allowing the plating process to proceed effectively within each individual cell region.
3Ease of manufacture
If standard plating method with seed layer is used, then phase change material can be deposited, but excess material cannot be eliminated without creating short circuits
Solution Approach 1:
The patent performs preliminary patterning to define via openings and forms the seed layer specifically within these defined regions before plating. This preliminary action ensures that the phase change material is deposited only where needed (within the vias and immediately surrounding regions) and prevents excess material from forming continuous conductive paths between adjacent cells, thereby eliminating the need for subsequent material removal that could create short circuits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables independent operation of phase change memory cells by preventing current leakage through the oxidation of seed layer edges, ensuring each cell functions independently and maintaining cell integrity during scaling.
Implementation Method 1
oxidizing edges of the conformal conductive seed layer formed along sides of each via
Implementation Method 2
electroplating phase change material on exposed portions of the conformal conductive seed layer
Implementation Method 3
phase change material, such as, for example, a chalcogenide alloy, that transforms into a crystalline state or an amorphous state during cooling after a heat treatment
Implementation Method 4
A current passed through the phase change material creates ohmic heating and causes the phase change material to melt
Data Source
AI summary
A phase change memory device includes a plurality of memory cells comprising a substrate having a contact surface with an array of conductive contacts to be connected with access circuitry and a nitride layer formed at the contact surface. A plurality of vias are formed through the nitride layer to the contact surface and correspond to each conductive contact, the vias including a conformal conductive seed layer lining each via along exposed portions of the nitride layer and the contact surface and having oxidized edges. A dielectric layer is recessed within the conformal conductive seed layer and exposes a center region of each via. A phase change material is recessed within the center region of each via. A conductive material that remains conductive upon oxidation is formed over the phase change material. A top electrode is formed on each memory cell.