Plated Power Package Metal Layer for Lower Resistance Paths
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Solution Overview
Problem
Semiconductor packages face challenges with thin metal layers that limit current flow and increase resistance, leading to unsatisfactory performance and electro-migration issues, particularly in power applications.
Innovation Solution
A plated metal layer is added on top of the highest metal layer in the package substrate, increasing its effective thickness and reducing overall resistance, while maintaining separation from the underlying metal layer to avoid equipment retooling costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If thin metal layers are used in the package substrate, then manufacturing cost and device complexity are reduced, but resistance increases and current handling capacity deteriorates
Solution Approach 1:
The patent adds a plated metal layer in the vertical dimension above the existing metal layers, transitioning from a planar thin-layer structure to a multi-layer vertical structure. This increases the effective metal thickness and current handling capacity without changing the base substrate design, resolving the contradiction between simplicity and reliability.
Solution Approach 2:
The patent creates a composite metal structure by plating an additional metal layer (such as copper or aluminum) on top of the existing metal layer. This composite structure combines the advantages of the base metal layer with the plated layer, achieving lower resistance and improved current handling while maintaining manufacturing simplicity.
2Reliability
If metal layer thickness is increased to reduce resistance, then current handling capacity improves, but manufacturing cost and process complexity increase
Solution Approach 1:
The plated metal layer is applied to the metal layers that are already formed and positioned in the substrate. This preliminary action of plating on existing structures allows the base substrate to be manufactured using standard thin-layer processes, while the plated layer is added subsequently to provide enhanced current handling without requiring complete retooling of the manufacturing line.
Solution Approach 2:
The patent segments the metal structure into multiple functional layers: the base metal layers formed during standard substrate manufacturing, and the additional plated metal layer applied subsequently. This segmentation allows each layer to be optimized independently - the base layers for signal routing and the plated layers for current handling - resolving the contradiction between manufacturing ease and performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution significantly reduces total resistance and mitigates electro-migration, enhancing current handling capacity and performance, especially in power applications.
Implementation Method 1
a plated metal layer plated on at least part of the first metal layer and positioned above the dielectric
Data Source
AI summary
In some examples, a semiconductor package comprises a multi-layer package substrate. The multi-layer package substrate includes first and second metal layers, the first metal layer positioned above the second metal layer and coupled to the second metal layer by way of a via. The substrate also includes a dielectric covering at least part of the first and second metal layers and the via. The package includes a plated metal layer plated on at least part of the first metal layer and positioned above the dielectric, a combination of the first metal layer and the plated metal layer being thicker than the second metal layer. The package includes a semiconductor die having a device side, the device side vertically aligned with and coupled to the plated metal layer.