Plated Through Holes Stabilize Semiconductor Substrate

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Solution Overview

Problem

Delamination issues during the degating process of semiconductor device packaging lead to performance degradation or failure, as the outer copper layer may stick to the mold gate region and peel away, exposing substrate fibers.

Innovation Solution

Incorporating a series of plated through holes with pads or rivets in the mold gate region to stabilize the substrate during degating, which can be electroplated with copper and include copper pads or rivets to bind the copper layers to the cores, reducing the likelihood of delamination.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the outer copper layer is plated on the mold gate region to aid release, then ease of operation improves, but delamination occurs during degating

Engineering Contradiction:
Improvemold gate releaseVSAvoidsubstrate integrity
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The mold gate region is segmented into multiple discrete plated through holes rather than a continuous plated layer. This segmentation allows the copper plating to provide release functionality at specific points while the unplated substrate regions maintain structural integrity and resist delamination during degating.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Copper plating is applied locally only at specific through hole locations in the mold gate region rather than uniformly across the entire region. This localized plating provides sufficient electrical connection and release aid functionality while minimizing the total plated area that could potentially delaminate.

Inventive Principle:
Principle #3Local quality

2Ease of operation

If gold plating is applied to the mold gate region to prevent sticking, then ease of operation improves, but delamination still occurs

Engineering Contradiction:
Improvemold gate releaseVSAvoidsubstrate integrity
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The mold gate region is segmented into multiple discrete plated through holes rather than a continuous plated layer. This segmentation allows the copper plating to provide release functionality at specific points while the unplated substrate regions maintain structural integrity and resist delamination during degating.

Inventive Principle:
Principle #1Segmentation

3Reliability

If plated through holes are added to stabilize the substrate, then reliability improves, but device complexity increases

Engineering Contradiction:
Improvesubstrate stabilityVSAvoidsubstrate structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The plated through holes serve multiple functions simultaneously: they provide electrical connections between layers, act as anchors to prevent substrate delamination during degating, and maintain structural integrity of the mold gate region. This multi-functionality reduces the need for additional separate features.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The structural reinforcement function is merged with the existing electrical connection function by using the same plated through holes for both purposes. Instead of adding separate reinforcement elements, the electrical vias are enhanced with plating that also provides mechanical anchoring.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The stabilization of the substrate at the mold gate region significantly reduces delamination, ensuring the gold plating remains intact and preventing moisture ingress, thus enhancing the reliability and performance of the packaged semiconductor device.

Implementation Method 1

The hole is made conducting by electroplating

Methodology Applied
Scientific EffectElectroplating: Electroplating

Data Source

PatentUS9165862B1Semiconductor device with plated through holes
Publication Date: 2015.10.20 NXP USA INC
  • US9165862B1 patent drawing
  • US9165862B1 patent drawing
  • US9165862B1 patent drawing

AI summary

A semiconductor device package such a as Ball Grid Array (BGA), includes a die attached to a substrate. The substrate has a series of plated through holes (PTH) that include a copper pad at each of their ends. The PTH are located in a mold gate region at a corner of the substrate beyond the periphery of the die. Each PTH contains a rivet. The PTH with the pads and rivets stabilize the substrate at the mold gate region, which reduces the possibility of substrate delamination upon degating following an encapsulation process.