Platform QoS Register for Multi-Core Resource Prioritization

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Solution Overview

Problem

Current systems lack mechanisms for fine-grained management of resources outside the processor core, limiting the ability of operating systems and applications to communicate service level requirements to platform-level Quality of Service (QoS) mechanisms, especially in multi-core, multi-threaded environments and virtualized server consolidations.

Innovation Solution

The introduction of a Platform QoS Register (PQR) that allows software to set priority levels for platform resources such as memory, I/O, interconnects, and power, enabling QoS enforcement mechanisms to allocate resources based on priority tags added to memory and I/O accesses, complementing the existing Task Priority Register (TPR) for core resource management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If Task Priority Register (TPR) is used for processor core resource management, then processor core priority enforcement is improved, but platform resource management capability remains insufficient

Engineering Contradiction:
Improveprocessor core priority enforcementVSAvoidplatform resource management capability
Core Design Contradiction:
Extent of automationVSAdaptability or versatility

Solution Approach 1:

The patent segments resource management into two distinct components: processor core management (handled by existing TPR) and platform resource management (handled by new Platform Priority Register - PPR). This segmentation allows each register to specialize in its domain, with TPR managing core execution priorities and PPR managing external platform resources like memory, I/O, and interconnects, thereby resolving the contradiction between core enforcement capability and platform versatility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extends the priority management system from a single dimension (processor core TPR) to multiple dimensions by introducing a second priority register (PPR) that operates independently at the platform level. This dimensional extension enables simultaneous management of core resources and platform resources with different priority schemes, allowing software to communicate service level requirements to platform QoS mechanisms while maintaining existing core management functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If more cores and computing power are added to computer platforms, then processing capacity is improved, but resource management complexity increases

Engineering Contradiction:
Improveprocessing capacityVSAvoidresource management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The Platform Priority Register (PPR) is designed as a universal control mechanism that manages multiple types of platform resources (memory, I/O devices, interconnects) through a single register interface. This multi-functional approach simplifies resource management complexity despite increased processing capacity, as software can set priorities for all platform resources through one unified mechanism rather than managing each resource type separately.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If virtualization technologies are implemented and servers are consolidated, then resource utilization efficiency is improved, but QoS communication capability between software and platform mechanisms is insufficient

Engineering Contradiction:
Improveresource utilization efficiencyVSAvoidQoS communication capability
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The Platform Priority Register (PPR) serves as an intermediary mechanism between software applications and platform-level QoS enforcement mechanisms. It captures service level requirements from software and translates them into priority tags that can be communicated to and enforced by platform resources such as memory controllers, I/O interfaces, and interconnect fabric, thereby enabling effective QoS communication in virtualized and consolidated server environments.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8458711B2Quality of service implementation for platform resources
Publication Date: 2013.06.04 INTEL CORP
  • US8458711B2 patent drawing
  • US8458711B2 patent drawing
  • US8458711B2 patent drawing

AI summary

A method, computer readable medium, and system are disclosed. In one embodiment, the method comprises setting a quality of service (QoS) priority level value for one or more computer system platform resources, other than a central processor core, relating to a task running on the computer system, and determining whether the one or more computer system platform resources will be allocated to the task based on the QoS priority level setting.