Plating Interconnect for Silicon Chip Package
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Solution Overview
Problem
Existing silicon chip connection methods, such as wire bonding, face limitations in achieving thin interconnections and are prone to defects, particularly in multi-chip module packages, and the flip chip process adds complexity and cost, making it unsuitable for all applications.
Innovation Solution
A method involving a pre-mold formation over a silicon chip package, followed by etching a trace pattern and plating rigid traces onto the pre-mold to create interconnections between the silicon die and external leads, using conductive materials like copper or silver, which are more reliable and cost-effective.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding is used for interconnections, then the connection process is simple and well-established, but the leads cannot be made thin and defects are common
Solution Approach 1:
The patent replaces the mechanical wire bonding process with a plating-based interconnection system. Rigid traces are formed by plating conductive material onto a pre-mold substrate, eliminating the need for mechanical wire bonds. This substitution enables thinner interconnections while improving reliability, as the plated traces provide more consistent electrical pathways without the weaknesses inherent in wire bond structures.
Solution Approach 2:
The invention changes the physical parameters of the interconnection system by transitioning from wire-based connections to plated trace connections. This parameter change allows for reduced lead thickness and improved connection reliability, as the plating process enables precise control over trace geometry and material properties, achieving thinner and more reliable interconnections.
2Length of moving object
If flip chip process is used to attach silicon die, then thinner interconnections can be achieved, but additional complex steps increase manufacturing cost
Solution Approach 1:
The patent extracts the complex steps of the flip chip process by implementing a different attachment methodology. Instead of requiring die inversion, solder bump formation, and reflow processing, the invention uses a pre-mold with integrated rigid traces that directly connect to lead fingers. This extraction of complex steps reduces manufacturing complexity while maintaining thin interconnection profiles.
Solution Approach 2:
The invention applies preliminary action by pre-forming the rigid trace interconnections on the pre-mold substrate before die attachment. The traces are etched and plated in advance, creating a ready-to-connect structure that eliminates the need for subsequent complex assembly steps required by flip chip processes, thereby reducing overall manufacturing complexity.
3Ease of manufacture
If wire bonding is used for multi-chip module packages, then the process is straightforward, but quality control becomes difficult and defects increase
Solution Approach 1:
The patent replaces the mechanical wire bonding system with a plating-based rigid trace system that provides more consistent and controllable interconnections. The plating process creates uniform trace geometries with predictable electrical properties, eliminating the variability and defect-prone nature of wire bonding, thereby improving quality control in multi-chip module packages.
4Volume of moving object
If smaller chips are used to support smaller devices, then device size is reduced, but interconnection density and precision requirements increase
Solution Approach 1:
The invention changes the parameters of the interconnection system by using plating to create rigid traces with precise and consistent dimensions. This parameter change enables the fabrication of smaller chips with higher interconnection precision, as the plating process provides better control over trace width, thickness, and placement accuracy compared to traditional wire bonding methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables thinner, more reliable interconnections between silicon dies and external leads, reducing defects and costs, while supporting denser interconnect geometries and smaller chip designs, thus addressing the limitations of traditional wire bonding and flip chip methods.
Implementation Method 1
plating rigid traces onto the trace pattern to provide rigid trace connections between the silicon die and external leads
Data Source
AI summary
A system, method, and silicon chip package for providing connections between a die of a silicon chip package and external leads of the silicon chip package is disclosed. The connections are formed using a pre-mold etched with a trace pattern. The trace pattern provides rigid traces that connect the die with the external leads.