Platinum Gradient NiSi Layer for Stress Liner Etch Damage
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Solution Overview
Problem
Conventional semiconductor devices experience degradation of nickel silicide (NiSi) layers during subsequent processing, leading to increased resistance and poor device performance, particularly due to physical damage during the removal of overlying stress liners.
Innovation Solution
A method involving the formation of nickel layers with a platinum composition gradient, where the platinum concentration increases away from the source/drain regions and gate electrode, is used to create a NiSi layer that shields against physical damage during etching, maintaining the integrity of the NiSi layer without increasing resistivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional nickel silicide layers are used in semiconductor devices, then the devices can be fabricated with standard processes, but the NiSi layers suffer physical damage during etching of overlying stress liners, leading to increased resistance and degraded device performance
Solution Approach 1:
The patent applies composite materials by combining nickel silicide (NiSi) with platinum to form a composite silicide layer. The platinum forms discrete precipitates within the NiSi matrix, creating a composite structure where the NiSi provides low resistivity and the platinum provides mechanical strength and damage resistance during subsequent etching processes.
Solution Approach 2:
The patent applies local quality by creating a non-uniform distribution of platinum within the NiSi layer. The platinum concentration varies locally, forming discrete precipitates rather than a uniform mixture. This local variation in composition allows the NiSi to maintain its electrical properties while the platinum precipitates provide localized reinforcement against physical damage during etching.
2Reliability
If platinum is added to NiSi layers to prevent damage, then the NiSi layer integrity is improved, but the complexity of the deposition process increases due to multiple layer formation steps
Solution Approach 1:
The patent applies segmentation by dividing the nickel deposition into multiple sequential steps: first depositing a nickel layer, then depositing additional nickel that contains platinum, and finally performing selective silicidation. This segmented approach allows precise control over platinum distribution and NiSi formation while managing process complexity through standardized deposition techniques.
Solution Approach 2:
The patent applies preliminary action by depositing the platinum-containing nickel layer before the actual silicidation process. The platinum is incorporated into the nickel structure in advance, and then both elements undergo silicidation together during the annealing process. This preliminary incorporation simplifies the overall process compared to attempting to add platinum after NiSi formation.
3Productivity
If standard nickel layers are deposited, then the deposition process is simple and fast, but the resulting NiSi layers are susceptible to damage during subsequent processing steps
Solution Approach 1:
The patent applies parameter changes by modifying the composition of the nickel layer through platinum addition. The platinum concentration is controlled at specific levels (e.g., 1-10 atomic percent) to optimize the balance between deposition efficiency and damage resistance. This parameter modification allows the NiSi layer to maintain low resistivity while gaining mechanical robustness during subsequent etching processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The platinum composition gradient effectively prevents NiSi layer damage during etching, reducing resistance and enhancing transistor performance by maintaining the integrity of the NiSi layer, thereby improving device parameters such as sheet resistance and drive current.
Implementation Method 1
forming a first layer of nickel containing a first amount of platinum over the transistor; forming a second layer of nickel containing a second amount of platinum on the first layer of nickel... annealing the first and second layers of nickel to form a layer of NiSi containing platinum having a composition gradient
Implementation Method 2
annealing the first and second layers of nickel to form a layer of NiSi over the source/drain regions and the gate electrode
Data Source
AI summary
Transistor devices are formed with nickel silicide layers formulated to prevent degradation upon removal of overlying stress liners. Embodiments include transistors with nickel silicide layers having a platinum composition gradient increasing in platinum content toward the upper surfaces thereof, i.e., increasing in platinum in a direction away from the gate electrode and source/drain regions. Embodiments include forming a first layer of nickel having a first amount of platinum and forming, on the first layer of nickel, a second layer of nickel having a second amount of platinum, the second weight percent of platinum being greater than the first weight percent. The layers of nickel are then annealed to form a nickel silicide layer having the platinum composition gradient increasing in platinum toward the upper surface. The platinum concentration gradient protects the nickel silicide layer during subsequent processing, as during etching to remove overlying stress liners, thereby avoiding a decrease in device performance.