PLC A/D Converter Ring Buffer Logging

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Solution Overview

Problem

Existing A/D converters in PLC systems face challenges in logging all analog-to-digital conversion values without data loss and reading them in a time series format, particularly due to asynchronous sampling periods and the need for dedicated communication processes.

Innovation Solution

An A/D converter with a shared memory featuring a ring buffer log storage area and a parameter storage area for a head pointer, allowing sequential logging and easy data retrieval without requiring specific communication processes, ensuring all data is logged and can be read in a time series.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a ring buffer configuration is used for logging A/D conversion values, then data can be continuously logged without loss, but it becomes difficult to distinguish between latest and oldest data and handle them in time series

Engineering Contradiction:
Improvedata logging completenessVSAvoiddata retrieval in time series
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent introduces a head pointer as an intermediary element that tracks the position of the latest data in the ring buffer. This head pointer serves as a mediator between the logging mechanism and data retrieval process, enabling the system to maintain continuous logging while providing clear indication of data boundaries for time series handling.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent adds a temporal dimension to the ring buffer by introducing a head pointer that indicates the latest data position. This transforms the static ring buffer structure into a dynamic one with temporal awareness, allowing data to be retrieved in time series order while maintaining continuous logging capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If data is stored in shared memory accessible by CPU unit, then dedicated communication processes are eliminated, but previous data is overwritten and cannot be successively collected

Engineering Contradiction:
Improvedata access without communication processVSAvoidhistorical data retention
Core Design Contradiction:
Ease of operationVSLoss of information

Solution Approach 1:

The patent prepares the shared memory with a pre-configured ring buffer structure and head pointer before data logging begins. This preliminary setup ensures that the memory is ready to continuously store new data while preserving historical data through the ring buffer mechanism, eliminating the need for dedicated communication processes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the storage parameter from simple overwriting to ring buffer configuration with head pointer tracking. This parameter change transforms the shared memory behavior from losing historical data to preserving it in a structured manner, enabling both direct CPU access and historical data retention.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If logging is performed in the analog input unit, then all A/D conversion values can be logged without fail, but reading the data requires repeated dedicated communication processes

Engineering Contradiction:
Improvedata logging completenessVSAvoidcommunication process time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the logging function and data storage function into a single integrated shared memory structure with ring buffer configuration. This consolidation allows the analog input unit to log data directly into shared memory that is simultaneously accessible by the CPU unit, eliminating the need for separate communication processes for data retrieval.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared memory with ring buffer configuration serves multiple functions: it acts as both the logging destination for the analog input unit and the data storage accessible by the CPU unit. This multi-functionality eliminates the need for dedicated communication processes while ensuring complete data logging.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8543744B2A/D converter and programmable controller system
Publication Date: 2013.09.24 MITSUBISHI ELECTRIC CORP
  • US8543744B2 patent drawing
  • US8543744B2 patent drawing
  • US8543744B2 patent drawing

AI summary

An A/D converter that is attached to a programmable controller (PLC) and sequentially converts an analog value inputted from outside into a digital value. The A/D converter includes: a shared memory that can read-access from a CPU unit that controls the entire PLC and includes a log storage area with a ring buffer configuration for sequentially logging the digital value and a parameter storage area for storing a head pointer serving as a parameter indicating a position where a next log data is stored; and a logging executing unit that writes a digital value in an address indicated by the head pointer in the log storage area as log data and updates the head pointer.