PLC Cycle-Time Prediction Without Physical Hardware
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Solution Overview
Problem
Current methods for testing cycle time in hardware-oriented software development, particularly for PLCs, are manual, time-consuming, and costly, often requiring expensive proprietary tools and hardware models.
Innovation Solution
A computer-implemented method using a pretrained language model to predict cycle times for software code increments, allowing testing without actual hardware implementation, and integrating this model into a Continuous Integration pipeline for automated cycle time analysis and optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If manual hardware testing is performed for cycle time verification, then testing accuracy is ensured, but time consumption and costs increase significantly
Solution Approach 1:
The patent creates a virtual copy of the PLC hardware environment through a simulation model that replicates the actual hardware's behavior and timing characteristics. This virtual model allows cycle time testing to be performed on software increments without requiring physical hardware, thereby maintaining measurement accuracy while dramatically reducing testing time and costs.
Solution Approach 2:
The patent introduces a simulation model as an intermediary between the software increment and the actual hardware. This intermediary allows the software to be tested in a virtual environment that closely mimics real hardware behavior, enabling accurate cycle time measurement without the need for physical hardware testing.
2Productivity
If proprietary tools and hardware models are used for automated cycle time testing, then testing speed is improved, but hardware costs and device complexity increase
Solution Approach 1:
Instead of using expensive proprietary hardware models, the patent creates a software-based simulation model that copies the essential timing and behavioral characteristics of the target PLC hardware. This virtual model achieves automated testing capability without requiring costly physical hardware or specialized proprietary tools.
Solution Approach 2:
The patent replaces the mechanical/physical hardware testing system with a software-based simulation system. By substituting physical hardware models with virtual simulations, the patent eliminates the need for expensive proprietary tools while maintaining automated testing functionality and speed.
3Adaptability or versatility
If software increments are frequently adjusted to meet cycle time requirements, then hardware compatibility is improved, but development time and costs increase
Solution Approach 1:
The patent performs preliminary cycle time testing using the simulation model before deploying software increments to actual hardware. This advance testing allows developers to identify and correct timing issues early in the development process, ensuring hardware compatibility is achieved with minimal iterative adjustments and reduced development time.
Solution Approach 2:
The simulation model provides immediate feedback on cycle time performance during the testing phase, allowing developers to adjust software increments based on virtual hardware responses before actual hardware deployment. This feedback mechanism reduces the need for repeated hardware testing and accelerates the adaptation process.
Data Source
AI summary
The invention relates to a computer implemented method for cycle time testing which is characterized in that a cycle time of a developed software code increment that is intended to be implemented on a first hardware, in particular a so called "Programable Logic Controller", PLC-program code increment, wherein said first hardware is a target hardware for which said developed software code increment is intended for, in particular said PLC, is tested at least for one time without said developed software code increment being implemented on any hardware, in particular said first hardware. It also relates to an arrangement for carrying out the method and a computer-program product.