PLC Input Module Encoding for Redundant Signal Verification

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Solution Overview

Problem

Existing programmable logic controllers (PLCs) lack reliable communication duplication for input signals, leading to potential data errors and malfunctions due to the lack of physical duplication, which can result in incorrect data transmission and system failures.

Innovation Solution

A programmable logic controller configuration with a CPU module and an input module that includes a first and second control unit, where the second control unit generates encoded data that cannot be decoded by the first control unit, allowing for virtual duplication of communication, enabling the CPU module to detect data errors by comparing input data and encoded data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If physical duplication of communication paths is implemented, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a virtual copy of the communication path by having the second control unit generate encoded data that cannot be decoded by the first control unit. This encoded data is then transmitted to the CPU module which decodes it and performs match comparison with the original data, effectively creating a redundant verification path without duplicating the entire communication infrastructure.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces an intermediary verification mechanism where the CPU module acts as a mediator between the control units. The CPU module receives both the original data from the first control unit and the encoded data from the second control unit, decodes the encoded data, and performs match comparison to verify data integrity, thus mediating the reliability verification without requiring direct duplication of communication paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If encoding and decoding processes are added, then data security is improved, but processing time increases

Engineering Contradiction:
Improvedata securityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The second control unit performs encoding of the data in advance before transmission to the CPU module. This preliminary encoding action ensures that when the data reaches the CPU module, the decoding and verification can be performed efficiently without additional processing delays during critical operation phases.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the parameter of data representation by encoding the data from the second control unit into a format that cannot be decoded by the first control unit. This parameter change enables secure verification while the encoding scheme is designed to allow efficient decoding by the CPU module, balancing security requirements with processing time constraints.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11789423B2Programmable logic controller
Publication Date: 2023.10.17 DENSO WAVE INC
  • US11789423B2 patent drawing
  • US11789423B2 patent drawing
  • US11789423B2 patent drawing

AI summary

Provided is a programmable logic controller comprising: a CPU module; and an input module that generates internal data corresponding to an input signal input from the outside, wherein the input module includes a first control unit and a second control unit, the second control unit generates the second control data by encoding second input data into data that cannot be decoded by the first control unit, the first control unit outputs the first control data including first input data and the second control data, the input module generates the internal data based on the first control data and transmit the internal data to the CPU module and the CPU module extracts the first input data and the second input data to determine whether the input data is correct.