PLC Program Parallelization for Multi-Core Execution
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Solution Overview
Problem
Existing methods for compiling IEC 61131-3 languages for execution in multi-core processors are inefficient, leading to unbalanced parallelism and idle CPU periods due to conservative dataflow analysis and lack of leveraging synchronous nature of PLC programs.
Innovation Solution
An automatic parallelization technique that combines dataflow and functional analysis to identify time delays in PLC programs, creating slices and distributing tasks across multiple resources for balanced parallel execution, optimizing processing time and resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conservative dataflow analysis is used to ensure correct parallel execution, then reliability is improved, but productivity deteriorates due to unbalanced parallelism and idle CPU periods
Solution Approach 1:
The patent segments the PLC program into multiple independent tasks that can be executed in parallel. By analyzing data dependencies and separating independent computation paths, the compiler creates discrete executable units that can be distributed across multiple CPU cores, thereby improving productivity while maintaining reliability through proper dependency management.
Solution Approach 2:
The patent implements dynamic task scheduling and load balancing mechanisms that adapt to runtime conditions. The system dynamically assigns tasks to available CPU cores based on current system state, preventing idle periods and optimizing resource utilization, which resolves the contradiction between reliable execution and productive throughput.
2Productivity
If multi-core processors are used to increase processing power, then productivity is improved, but device complexity worsens due to compilation and scheduling challenges
Solution Approach 1:
The patent implements self-service mechanisms where the compilation system automatically analyzes program dependencies, identifies parallelization opportunities, and generates optimized multi-core code without requiring manual intervention. The system services its own complexity management needs through automated static analysis and intelligent scheduling algorithms, making multi-core compilation accessible despite inherent complexity.
Solution Approach 2:
The patent transforms the compilation problem by changing parameters from sequential execution models to parallel execution models. It introduces new compilation parameters such as task granularity, parallelization thresholds, and scheduling policies that allow the system to optimize for multi-core environments while managing complexity through parameterized control rather than hard-coded solutions.
3Productivity
If finer-grain parallelization is implemented to balance CPU utilization, then productivity is improved, but device complexity increases due to more granular task management
Solution Approach 1:
The patent applies partial parallelization by identifying and parallelizing only the independently executable portions of the PLC program, rather than attempting to parallelize the entire program. This selective approach achieves sufficient CPU utilization balance without the excessive complexity of fine-grain parallelization across all program elements, implementing parallelism where it provides benefit while avoiding unnecessary management overhead.
Data Source
AI summary
A method of identifying and extracting functional parallelism from a PLC program has been developed that results in the ability of the extracted program fragments to be executed in parallel across a plurality of separate resources, and a compiler configured to perform the functional parallelism (i.e., identification and extraction processes) and perform the scheduling of the separate fragments within a given set of resources. The inventive functional parallelism creates a larger number of separable elements than was possible with prior dataflow analysis methodologies.