PLC Parallel Task Prioritization for Real-Time Deadline Compliance

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Solution Overview

Problem

Programmable logic controllers (PLCs) face challenges in meeting real-time processing deadlines due to varying cycle times of programs, which can lead to delays and potential safety issues in automation systems, especially when exceeding deadlines may result in damage or injury.

Innovation Solution

The method involves assigning priority levels to parallel processing sections of programs and using a data structure to manage these priorities, allowing master-processor cores to process tasks independently while parallel-processor cores assist in meeting real-time conditions by processing high-priority tasks, thereby optimizing resource utilization and reducing overall processing time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If programs are executed sequentially on a single processor core, then device complexity is reduced, but productivity decreases due to inability to meet tight deadlines

Engineering Contradiction:
Improveprocessing speedVSAvoidprocessor architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The program is divided into multiple sections with different priority levels, allowing critical time-dependent operations to be separated from less time-sensitive operations. This segmentation enables the system to meet tight deadlines for critical functions while maintaining overall system functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different sections of the program are assigned different priority levels based on their time-critical nature. Critical sections receive higher priority to ensure they execute within required time windows, while non-critical sections can execute with lower priority, optimizing resource allocation for time-sensitive operations.

Inventive Principle:
Principle #3Local quality

2Reliability

If multiple programs with different cycle times are executed on the same processor core, then device complexity is reduced, but reliability decreases due to deadline misses

Engineering Contradiction:
Improvedeadline complianceVSAvoidprogram management
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Priority levels for different program sections are determined in advance based on their time-critical requirements. This preliminary classification allows the processor to automatically execute sections in the correct priority order without complex runtime decision-making, ensuring deadline compliance while simplifying runtime management.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system monitors execution timing and priority level assignments to ensure that critical sections complete within their required time windows. This feedback mechanism allows for verification of deadline compliance and potential adjustment of priority assignments to maintain reliability.

Inventive Principle:
Principle #23Feedback

3Productivity

If program execution is interrupted and continued later, then productivity is improved by meeting deadlines, but loss of time increases due to interruption overhead

Engineering Contradiction:
Improvedeadline meetingVSAvoidinterruption overhead
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The processor dynamically adjusts execution priorities based on real-time requirements. When a high-priority section becomes ready for execution, the system interrupts lower-priority sections and switches to the critical section, minimizing the time lost to interruptions by only switching when necessary for deadline compliance.

Inventive Principle:
Principle #15Dynamics

4Productivity

If processor cores operate in parallel, then productivity increases, but device complexity increases due to coordination requirements

Engineering Contradiction:
Improveprocessing throughputVSAvoidmulti-core coordination
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The program is segmented into independent sections that can be executed in parallel on different processor cores. Each section is assigned a priority level that determines its execution timing, allowing parallel processing without requiring complex inter-core coordination for critical sections.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Priority levels and execution timing for parallel sections are determined in advance, allowing the system to coordinate multiple processor cores without complex runtime communication. Each core independently executes its assigned sections according to pre-determined priorities, reducing coordination overhead.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11775351B2Method for processing data and programmable logic controller
Publication Date: 2023.10.03 BECKHOFF AUTOMATION GMBH
  • US11775351B2 patent drawing
  • US11775351B2 patent drawing
  • US11775351B2 patent drawing

AI summary

A method for processing data on a programmable logic controller includes a priority with a predetermined priority level assigned to at least one parallel processing section of a program of a master-processor core of a control task. Respective priority levels are inserted into a data structure as the respective master-processor core arrives at the parallel processing section. A parallel-processor core examines whether entries are present in the data structure and processes partial tasks from a work package of the master-processor core the priority level of which ranks first among the entries. A real-time condition of the control task is met by setting executing times of the programs for the master-processor core so that the master-processor core is capable of processing the partial tasks from the work packages without being supported by the parallel-processor core. The master-processor core further processes partial tasks not processed by the at least one parallel-processor core.