PLCP Header Encoding to Eliminate Pad Bits in Symbol Blocks
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Solution Overview
Problem
Wireless networking systems face inefficiencies in data transmission due to misalignment of data elements with symbol blocks, leading to unnecessary overhead and pad bits in wireless networks, particularly in body area networks.
Innovation Solution
The implementation of a physical layer convergence protocol (PLCP) header processor that aligns headers with symbol blocks, generating check values and error correction codes to ensure the total number of information bits is an integer multiple of bits per symbol, thereby optimizing transmission efficiency by eliminating unnecessary pad bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data elements are transmitted without alignment to symbol blocks, then transmission simplicity is maintained, but transmission efficiency deteriorates due to unnecessary overhead and pad bits
Solution Approach 1:
The patent applies preliminary action by pre-calculating and appending check values and error correction codes to the physical layer header before transmission. This ensures that the total number of information bits is an integer multiple of bits per symbol, aligning the header with symbol blocks in advance and eliminating the need for additional pad bits, thereby improving transmission efficiency without adding complex real-time processing requirements
Solution Approach 2:
The patent changes the parameter of information bit count by dynamically adjusting the concatenation of physical layer header, check value, and error correction code to achieve an integer multiple of bits per symbol. This parameter adjustment aligns the data structure with symbol block requirements, eliminating wasted space from misalignment and improving overall transmission efficiency
2Productivity
If check values and error correction codes are added to align headers with symbol blocks, then transmission efficiency is improved, but the number of information bits increases
Solution Approach 1:
The patent converts the potential harm of increased header size into a benefit by showing that the additional check values and error correction codes, while increasing the raw bit count, actually improve overall network efficiency by eliminating the need for multiple retransmissions due to errors and by ensuring proper symbol block alignment. The overhead is justified by the reliability and efficiency gains
3Productivity
If pad bits are used to align headers with symbol blocks, then symbol alignment is achieved, but transmission overhead increases
Solution Approach 1:
The patent extracts the alignment function from traditional pad bits by using check values and error correction codes to achieve the same symbol block alignment purpose. Instead of adding meaningless pad bits that only increase overhead, the invention extracts and utilizes the functional bits needed for error handling to simultaneously achieve alignment, thereby eliminating wasteful overhead while maintaining proper symbol structure
Data Source
AI summary
Apparatus and method for processing a physical layer protocol convergence (PLCP) header. In one embodiment, a wireless device includes a PLCP header processor. The PLCP header processor is configured to: process a physical layer header, process a check value based on the physical layer header, and process an error correction code based on the physical layer header and the check value. A concatenation of the physical layer header, check value, and error correction code the PLCP header processor is configured to process consists of a number of information bits that is an integer multiple of a number of information bits per symbol used to encode the PLCP header.