PLD Configuration Bitstream Without Phantom Bits
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Solution Overview
Problem
Conventional methods for configuring programmable logic devices (PLDs) result in configuration bit streams that include 'phantom bits' not corresponding to physical configuration elements, leading to larger memory requirements and increased configuration times due to compression and decompression processes.
Innovation Solution
A control block generates a new configuration bit stream by removing phantom bits and adding padding bits to ensure proper configuration, using design information to determine the necessary bits for each physical configuration element, thus creating a more efficient bit stream.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional configuration bit streams with phantom bits are used, then all address locations can be uniformly addressed by Data Registers and Address Registers, but the configuration bit stream size increases and memory requirements increase
Solution Approach 1:
The patent extracts and removes phantom bits from the configuration bit stream, keeping only the bits that correspond to actual physical configuration elements. This reduces the configuration bit stream size while maintaining the ability to properly configure the PLD through selective addressing of valid bits.
Solution Approach 2:
The patent introduces dynamic control logic that adapts the configuration process based on the presence or absence of phantom bits. The system dynamically generates control signals to handle variable bit stream formats, allowing flexible configuration whether phantom bits are present or removed.
2Quantity of substance
If configuration bit stream compression is applied, then configuration bit stream size is reduced, but configuration time increases due to decompression requirements
Solution Approach 1:
The patent converts the previously harmful phantom bits into a beneficial structure by removing them entirely. This eliminates the need for compression/decompression operations, as the bit stream is already optimized in size through selective bit inclusion, thereby avoiding the time penalty of compression processing.
3Quantity of substance
If phantom bits are removed from the configuration bit stream, then memory size requirements are reduced, but the configuration process becomes more complex
Solution Approach 1:
The patent performs preliminary organization of configuration bits during the EDA tool design phase, where the configuration bit stream is generated without phantom bits from the start. This preliminary structuring eliminates the need for complex runtime processing to handle phantom bit removal, as the optimized format is established beforehand.
Solution Approach 2:
The patent introduces an intermediary control block that acts as a mediator between the configuration bit stream source and the PLD configuration elements. This control block handles the mapping and selection of valid bits, simplifying the overall process by centralizing the complexity in a dedicated interface component rather than distributing it throughout the system.
4Adaptability or versatility
If multiple configuration bit streams are stored in the same storage device, then design versatility is improved, but storage management complexity increases
Solution Approach 1:
The patent segments the configuration bit stream into distinct, efficiently-packed units without phantom bits. This segmentation allows multiple configuration bit streams to be stored as separate, compact entities in the same storage device, with each stream optimized for its specific design, thereby facilitating versatile storage management.
Data Source
AI summary
Techniques and mechanisms generate a configuration bit stream to load into a circuit such as a Programmable Logic Device (PLD). A configuration bit stream may have a reduced size if “phantom bits” not corresponding to configuration elements are removed. However, the PLD may need a full-sized and properly ordered configuration bit stream in order to be properly configured. Techniques and mechanisms are described for selectively adding a “padding bit” to compensate for the missing phantom bits.