PLD Configuration via Non-Volatile Memory and Internal Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for configuring programmable logic devices (PLDs) like FPGAs are burdensome, especially in hardware co-simulation, as they require frequent reprogramming of PROMs and lack explicit reset mechanisms, leading to inefficiencies in managing dynamic circuit designs.
Innovation Solution
A method and system for managing PLD configuration using a non-volatile memory to store and load configuration images, allowing for remote reconfiguration of PLDs via a communications link, with a server configuration image loaded upon power-on and auxiliary data storage for subsequent access, enabling seamless switching between configuration images.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If PROM is used to store configuration image for PLD, then configuration can be loaded upon power-up, but frequent reprogramming is burdensome and time-consuming
Solution Approach 1:
The configuration image is pre-loaded into the PLD's internal memory during power-up from the PROM. This preliminary action ensures the PLD is ready to operate immediately upon power-up, while subsequent reconfigurations can be performed more efficiently by loading new configuration images into internal memory without requiring PROM erasure and reloading, thus reducing the time loss for frequent reprogramming operations.
2Adaptability or versatility
If PLD is reconfigured frequently for hardware co-simulation, then dynamic circuit designs can be tested, but PROM must be reprogrammed for each configuration
Solution Approach 1:
The configuration system is segmented into two parts: the PROM for initial configuration storage and the PLD's internal memory for dynamic reconfiguration. This segmentation allows the PROM to remain unchanged while multiple configuration images can be loaded into internal memory for frequent switching between different circuit designs, thereby maintaining adaptability while reducing reconfiguration complexity.
Solution Approach 2:
The PLD's internal memory acts as an intermediary between the PROM and the programmable logic resources. Instead of directly reprogramming the PROM for each configuration change, the system loads configuration images into the internal memory intermediary, which then provides them to the PLD. This intermediary approach simplifies the reconfiguration process while maintaining the ability to test multiple circuit designs.
3Ease of manufacture
If configuration image is serially loaded from PROM upon power-up, then PLD can be programmed, but the process is slow for frequent reconfigurations
Solution Approach 1:
The system merges the advantages of PROM-based initial configuration (simplicity and reliability) with the speed of internal memory-based reconfiguration. The PROM provides a simple, reliable initial configuration source, while the internal memory enables rapid loading of additional configuration images. This combination allows the system to maintain ease of manufacture through the simple PROM interface while achieving high reconfiguration productivity through fast internal memory access.
Data Source
AI summary
A method of managing programmable device configuration can include running a server configuration image within the programmable device and storing a different configuration image within a non-volatile memory communicatively linked with the programmable device. Responsive to a switch request sent from the client to the programmable device over the communications link, the different configuration image can be loaded into the programmable device.