PLD-Based Connector Pin Testing System

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Solution Overview

Problem

Conventional methods are inconvenient for testing the connection status of connectors, particularly in complex circuits, and cannot effectively test signals like pull-up, pull-down, power, and ground signals using boundary scan technology.

Innovation Solution

A pin connection testing system and method utilizing a demultiplexer, analog-to-digital converter, microcontroller, and programmable logic device (PLD) in a boundary scan test environment, where the PLD controls the demultiplexer to transmit signals to different lines for conversion and reading, generating messages for open-circuit conditions based on signal types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If conventional multimeter probing method is used to test connector connection status, then simple two-point connection can be tested, but it becomes inconvenient and difficult when testing complicated circuits with multiple pins

Engineering Contradiction:
Improveconvenience of testing connector connection statusVSAvoidcomplexity of testing system
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent implements a universal testing system that can handle multiple signal types (I/O interconnection signals, power signals, ground signals, pull-up signals, pull-down signals) through a unified boundary scan architecture. The PLD-based controller and demultiplexer system provide multi-functional testing capabilities, eliminating the need for different testing methods for different signal types and greatly improving testing convenience for complicated circuits with multiple pins.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If boundary scan technology is used to test I/O pins, then I/O interconnection signal testing is automated, but it cannot test other signals such as power, ground, pull-up, and pull-down signals

Engineering Contradiction:
Improverange of signal types that can be testedVSAvoidcomplexity of testing system architecture
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extends boundary scan technology to become a universal testing platform that handles multiple signal types. By adding voltage detection circuits, demultiplexers, and appropriate detection logic in the PLD, the system can test I/O interconnection signals, power signals, ground signals, pull-up signals, and pull-down signals through the same automated boundary scan interface, significantly improving adaptability without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces intermediate components such as demultiplexers and voltage detection circuits that act as mediators between the boundary scan interface and various signal types. These intermediaries enable the PLD to indirectly detect non-I/O signals by routing them through the boundary scan network, allowing expanded signal type coverage while maintaining the core boundary scan architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If separate testing methods are used for different signal types, then each signal can be tested appropriately, but the testing process becomes complex and time-consuming

Engineering Contradiction:
Improveaccuracy of signal detectionVSAvoidtesting efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple testing functions into a single unified boundary scan-based testing system. By combining I/O signal testing, power signal detection, ground signal detection, pull-up signal detection, and pull-down signal detection into one integrated system controlled by the PLD, the patent achieves both reliable detection of all signal types and improved testing efficiency through automated multi-functional operation.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements preliminary configuration of the testing system through PLD programming and demultiplexer setup before actual testing begins. The system pre-configures detection paths and voltage thresholds for different signal types, allowing rapid switching between different signal testing modes without requiring manual reconfiguration during the testing process, thereby improving productivity while maintaining detection accuracy.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the convenience of testing connector pin connections by enabling the detection of various signal types, improving the accuracy and efficiency of connector status assessment.

Implementation Method 1

The at least one ADC comprises a set of analog input pins electrically connected to the first line, and configured to convert the to-be-tested signal which is transmitted to the first line into a digital voltage value

Methodology Applied
Scientific EffectAnalog-to-digital conversion:

Data Source

PatentUS10585141B2Pin connection testing system for connector, and method thereof
Publication Date: 2020.03.10 INVENTEC PUDONG TECH CORPOARTION
  • US10585141B2 patent drawing
  • US10585141B2 patent drawing
  • US10585141B2 patent drawing

AI summary

A pin connection testing system for connector, and a method thereof are disclosed. In the pin connection testing system, a JTAG instruction is used to control a PLD, to drive the demultiplexer to transmit each to-be-tested signal, which is from the connector, to a first line or a second line; and, when the to-be-tested signal is transmitted to the first line, the to-be-tested signal is converted from analog to digital and encoded, and then transmitted to I/O pins of the PLD for reading; and, when the JTAG command is transmitted to the second line, the PLD reads the statuses of the I/O pins electrically connected to the second line; and then the PLD generates a test result according to the to-be-tested signals and the read I/O pins. Therefore, the technical effect of improving convenience in testing the connection status of the connector can be achieved.