PLD Delay-Specific Routing Using Dual Wave Maze Search
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Solution Overview
Problem
Programmable logic devices (PLDs) face inefficiencies in routing connections due to limited routing resources and inaccurate estimation-based delay-specific routing methods, leading to failed routings and increased processing time.
Innovation Solution
Implementing a dual wave maze routing process that calculates full physical paths and timing delays, eliminating estimations and allowing for more efficient search of available resources to ensure timing error-free design routing without substantial increases in computing resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If estimation-based delay-specific routing methods are used, then routing speed is improved, but routing accuracy deteriorates leading to timing errors
Solution Approach 1:
The patent replaces the estimation-based routing method with a physics-based electromagnetic simulation approach. Instead of using simplified models that estimate signal propagation delays, the invention employs full-wave electromagnetic field solvers to calculate actual timing delays, substituting mechanical approximation with fundamental physical laws to achieve both accuracy and computational efficiency.
Solution Approach 2:
The invention changes the fundamental parameters used in routing calculations from estimated values to physically accurate electromagnetic simulation results. By transforming the routing metric from an approximation to a physics-based measurement, the system achieves timing error-free routing while maintaining computational tractability through optimized simulation algorithms.
2Loss of time
If conventional routing methods are used, then processing time is reduced, but routing reliability deteriorates due to failed routings
Solution Approach 1:
The patent applies preliminary electromagnetic simulation and timing analysis during the routing planning phase, before final routing decisions are made. By performing advance simulations to identify potential timing violations and routing conflicts, the system prevents failed routings before they occur, eliminating the need for time-consuming ripup and reroute operations.
Solution Approach 2:
The invention implements a feedback mechanism where electromagnetic simulation results are continuously fed back into the routing algorithm. This closed-loop approach allows the system to learn from simulation outcomes and adjust routing decisions in real-time, significantly improving routing success rates while maintaining efficient processing through iterative optimization.
3Device complexity
If limited routing resources are used, then device complexity is reduced, but routing capability deteriorates
Solution Approach 1:
The patent applies local quality optimization by enhancing routing capabilities at critical locations within the PLD while maintaining overall structural simplicity. Electromagnetic simulation and timing-driven routing are applied selectively to high-performance regions and critical signal paths, allowing the device to achieve superior routing capability where needed without increasing overall device complexity.
Solution Approach 2:
The invention introduces dynamic routing capabilities that adapt to different design requirements and timing constraints. The routing system can dynamically adjust path selection, resource allocation, and timing optimization based on the specific application, enabling limited routing resources to serve multiple functions and achieve higher versatility without increasing physical device complexity.
Data Source
AI summary
Various techniques are provided to efficiently implement user designs in programmable logic devices (PLDs). In one example, a computer-implemented method includes determining delay windows for connections in a routing of a design for a PLD, identifying invalid connections in the routing based, at least in part, on the determined delay windows, and routing the invalid connections using a dual wave maze routing process to provide a delay-specific routing for the design. The delay-specific routing may be used to generate configuration data to configure physical components of the PLD, and the configuration data may be used to program the PLD to conform to the timing constraints of the design and/or PLD.


