Partitioned Flash Memory for PLD Reconfiguration Data Retention

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Solution Overview

Problem

Conventional programmable logic devices (PLDs) cannot preserve data stored in volatile memory during reconfiguration and lack direct user access to non-volatile memory, leading to data loss and limited storage and access capabilities.

Innovation Solution

Incorporating a programmable logic device with non-volatile memory partitioned into configuration and user flash sections, allowing data from volatile memory to be stored in non-volatile memory for preservation and providing direct external access to user data, enabling shadow flash functionality for volatile memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional PLD reconfiguration is performed, then the PLD can be reprogrammed with new configuration data, but data stored in volatile memory is lost

Engineering Contradiction:
Improvereconfiguration capabilityVSAvoiddata loss in volatile memory
Core Design Contradiction:
Adaptability or versatilityVSLoss of information

Solution Approach 1:

The patent implements a shadow flash memory that is pre-configured to mirror the volatile memory contents before reconfiguration occurs. During the reconfiguration process, the shadow flash preserves the original data while the volatile memory is updated with new configuration data, eliminating data loss without compromising reconfiguration capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a copy of the volatile memory data in the shadow flash memory before reconfiguration. This copy serves as a backup that preserves user data while allowing the volatile memory to be reprogrammed, thus resolving the contradiction between reconfiguration and data preservation

Inventive Principle:
Principle #26Copying

2Quantity of substance

If non-volatile memory is added for user data storage, then storage capacity is improved, but device complexity increases

Engineering Contradiction:
Improvestorage capacityVSAvoidmemory architecture complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent merges the configuration memory and user data storage into a unified non-volatile memory structure with partitioned access. The shadow flash memory serves dual purposes: preserving configuration data during reconfiguration and providing user data storage, thereby increasing storage capacity without proportionally increasing device complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shadow flash memory is designed to perform multiple functions: it acts as a backup for volatile memory during reconfiguration, provides persistent user data storage, and can be directly accessed by external devices. This multi-functionality increases storage capacity while minimizing the addition of separate dedicated components

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of operation

If direct external access to non-volatile memory is provided, then user access capability is improved, but control over memory access becomes more complex

Engineering Contradiction:
Improveuser access to non-volatile memoryVSAvoidmemory access control
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent segments the non-volatile memory into distinct regions: a configuration region that is protected and only accessible during reconfiguration, and a user data region that is directly accessible by external devices. This segmentation provides direct user access to user data while maintaining controlled access to configuration data, balancing ease of operation with access control

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7957208B1Flexible memory architectures for programmable logic devices
Publication Date: 2011.06.07 LATTICE SEMICON CORP
  • US7957208B1 patent drawing
  • US7957208B1 patent drawing
  • US7957208B1 patent drawing

AI summary

In one embodiment, a programmable logic device includes a plurality of logic blocks; a plurality of input/output blocks; volatile configuration memory adapted to store configuration data for configuration of the logic blocks and input/output blocks; embedded block RAM adapted to store user data; flash memory having at least a first partition and a second partition; and a data port adapted to provide external device access to the first partition of the non-volatile memory. The flash memory is adapted to store within the first partition user data from the data port and is further adapted to store within the second partition user data from the embedded block RAM.