Programmable Logic Device IDCODE Customization via Multiplexer Selection

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Solution Overview

Problem

Conventional programmable logic devices (PLDs) do not allow users to change the hard-wired 32-bit boundary scan identification code (IDCODE), limiting customization and proprietary device functionality.

Innovation Solution

Incorporating a multiplexer and multiple memory blocks to select between a hard-wired and user-specified identification code, enabling users to customize the IDCODE and provide a custom IDCODE in response to JTAG requests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a conventional PLD uses a hard-wired identification code, then the device structure is simple and reliable, but the user cannot customize the identification code

Engineering Contradiction:

Improveidentification code customizationVSAvoiddevice structure

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The identification code storage is segmented into multiple memory blocks (first memory and second memory), each capable of storing different identification codes. This segmentation allows the system to select between different code sources without requiring a complete redesign of the identification code architecture.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A multiplexer is introduced as an intermediary component between the memory blocks and the identification code output. The multiplexer selects which memory block's content is presented as the active identification code, enabling customization without directly modifying the hard-wired code structure.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If a PLD allows user customization of identification code, then user-specific functionality is enhanced, but the device complexity increases

Engineering Contradiction:

Improveuser customization capabilityVSAvoidmemory and multiplexer structure

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory blocks are designed to serve multiple functions: they can store identification codes for customization purposes, and they can also store user code data. This multi-functionality reduces the need for separate dedicated structures for each purpose, thereby limiting the increase in device complexity.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system dynamically switches between different identification codes based on control signals. The multiplexer can be controlled to select between the first memory's identification code and the second memory's identification code, allowing flexible adaptation without permanent structural changes.

Inventive Principle:

Principle #15Dynamics

3Adaptability or versatility

If multiple memory blocks are used to store identification codes, then code selection flexibility is improved, but the device area increases

Engineering Contradiction:

Improveidentification code selection flexibilityVSAvoiddevice area

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

Multiple memory blocks are merged into a unified identification code storage system with a common output interface through the multiplexer. This merging approach allows the system to maintain multiple code storage options while sharing common control and output infrastructure, thereby reducing the total area compared to completely separate systems.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS7702977B1Programmable logic devices with custom identification systems and methods

Publication Date: 2010.04.20 LATTICE SEMICON CORP

AI summary

In one embodiment, a programmable logic device includes a first multiplexer; a first memory adapted to store an identification code of the programmable logic device; and a second memory adapted to store an identification code of the programmable logic device. Inputs of a second multiplexer are coupled to the first memory and the second memory, and an output of the multiplexer is coupled to an input of the first multiplexer. The second multiplexer is adapted to select between the identification code stored in the first memory and the identification code stored in the second memory to provide the selected identification code to the first multiplexer.