Modular PLD Interface Macros for Dynamic Reconfiguration
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Solution Overview
Problem
Current programmable logic devices (PLDs) face limitations in dynamic reconfiguration due to the scarcity of three-state buffer (tbuf) macros, which restrict the number of reconfigurable modules and the design of their interfaces, as tbufs can only handle a fixed number of signals.
Innovation Solution
The implementation of logic interface macros at the boundaries between modules allows for dynamic reconfiguration of reconfigurable modules, increasing the number of interface signals and expanding timing constraints, enabling more complex designs and efficient communication between static and dynamic regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If three-state buffer (tbuf) macros are used as interfaces for reconfigurable modules, then dynamic reconfiguration can be achieved, but the number of reconfigurable modules is restricted due to scarce tbuf resources
Solution Approach 1:
The patent replaces specialized tbuf macros with universal logic interface macros that can handle multiple signal types and configurations. These macros are built from standard programmable logic resources (LUTs, flip-flops, multiplexers) that can be dynamically reconfigured to serve different interface functions, eliminating the need for dedicated tbuf resources for each reconfigurable module.
Solution Approach 2:
The patent changes the fundamental parameters of the interface macro by using programmable logic resources with configurable behavior rather than fixed three-state buffer characteristics. The logic interface macros can be programmed to exhibit different transfer functions, buffering behaviors, and routing capabilities through configuration data, allowing the same physical resources to adapt to different reconfiguration scenarios.
2Reliability
If three-state buffer (tbuf) macros are used as interfaces, then module isolation during reconfiguration is enabled, but the design is restricted to a fixed number of signals
Solution Approach 1:
The logic interface macros serve multiple functions including signal isolation, buffering, routing, and configuration management within a single unified structure. This multi-functional approach replaces the need for multiple specialized tbuf macros, allowing the interface to handle a larger number of signals while maintaining isolation capabilities through programmable control.
Solution Approach 2:
The patent merges the functions of multiple tbuf macros into a single logic interface macro structure that combines isolation logic, signal routing, and configuration control. By consolidating these previously separate functions into unified programmable logic blocks, the system achieves the same isolation reliability while supporting expanded signal capacity.
3Adaptability or versatility
If more reconfigurable modules are instantiated, then design flexibility increases, but tbuf resource consumption increases
Solution Approach 1:
Instead of using physical tbuf macro copies for each reconfigurable module, the patent uses virtualized logic interface macros implemented in programmable logic. The same physical logic resources can be dynamically reprogrammed to serve as interface macros for different reconfigurable modules at different times, effectively creating virtual copies without consuming additional physical tbuf resources.
Data Source
AI summary
Method, apparatus, and computer readable medium for modular circuit design for a programmable logic device (PLD) is described. In one example, a circuit design is captured. The circuit design includes a plurality of modules and one or more logic interface macros positioned on a floorplan. Each of the plurality of modules is one of a static module or a reconfigurable module. The one or more logic interface macros include programmable logic of the PLD and are positioned at one or more boundaries between one or more pairs of the plurality of modules. Each of the plurality of modules is implemented using information generated from the capturing step. The modules are assembled using the information generated from the capturing step and implementing step. Routing for a static module can cross a defined implementation area for a reconfigurable module, and a static module can be placed anywhere outside of reconfigurable module areas.