PLD JTAG Bridge for Fast Programming of Non-JTAG Memory

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Solution Overview

Problem

Programming external configuration memory devices without a JTAG interface through a component with a JTAG interface is inefficient due to the limitations of the JTAG EXTEST method, which is slow and complex, requiring serial shifting of all I/O control bits and limited bandwidth.

Innovation Solution

Programming hardware into the component with a JTAG interface to enable programming of external memory devices, using the component as a serial data link and controlling timing and protocol to program the memory, allowing for efficient data transfer and reduced logistics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the JTAG EXTEST method is used to program external memory devices without a JTAG interface, then programming capability is achieved, but programming speed is slow and bandwidth is limited

Engineering Contradiction:
Improveprogramming speedVSAvoidprogramming time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the programming process by separating configuration memory programming from user memory programming. The PLD's configuration memory is programmed via JTAG to load a bootloader, which then handles user memory programming through parallel interfaces, dividing the workload to achieve faster overall programming

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a bootloader as an intermediary component stored in the PLD's configuration memory. This bootloader acts as a mediator that receives programming commands through JTAG and translates them into parallel programming operations for the external user memory, enabling fast programming without direct JTAG access to the user memory

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If the JTAG EXTEST method is used to program external memory devices, then programming capability is achieved, but the programming procedure becomes complex

Engineering Contradiction:
Improveprogramming simplicityVSAvoidprogramming procedure complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent implements self-service by having the PLD's configuration memory and bootloader handle the complexity of JTAG protocol translation and command interpretation. The external memory device simply receives parallel programming commands without needing to understand JTAG protocols, making the overall system easier to operate

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent applies preliminary action by pre-programming the PLD's configuration memory with a bootloader that contains all the necessary programming logic. This preliminary setup eliminates the need for complex host controller programming, as the bootloader automatically handles subsequent programming operations

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If commodity memory devices without JTAG interface are used for configuration storage, then cost is reduced and versatility is improved, but programming capability is lost

Engineering Contradiction:
Improvememory device compatibilityVSAvoidprogramming capability
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent achieves universality by making the PLD serve multiple functions: it acts as both the target device for JTAG programming and as a programming device for the external memory. The bootloader in the PLD's configuration memory provides multi-functionality by handling both system initialization and external memory programming operations

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7454556B1Method to program non-JTAG attached devices or memories using a PLD and its associated JTAG interface
Publication Date: 2008.11.18 XILINX INC
  • US7454556B1 patent drawing
  • US7454556B1 patent drawing
  • US7454556B1 patent drawing

AI summary

A method is provided to program a memory device through a JTAG interface of an attached component with programmable logic, wherein the memory device does not have a JTAG interface. Initially, programming hardware to provide for programming of the attached memory is downloaded into the component via the component's JTAG interface. The programmed component then becomes a serial data link between the JTAG port attached to a host programmer and a non-JTAG port attached to the memory device. The circuitry downloaded or programmed into the component controls the timing and the protocol to program the external memory.