PLD Boot Core Readback Encoding for Configuration Data

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Solution Overview

Problem

Current methods for reading back configuration data from programmable logic devices (PLDs) are inefficient, lacking a systematic approach for encoding and decoding data, which hampers the reconfiguration and management of these devices.

Innovation Solution

A method and system that involve accessing boot cores within the PLD to configure and encode configuration data using internal interfaces and processors, enabling the encoding and decoding of data through dedicated encoder and decoder cores, and transmitting this data via peripheral interfaces for external processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If configuration data is read back from PLD using conventional methods, then data can be retrieved, but the process is inefficient and lacks systematic encoding/decoding capability

Engineering Contradiction:
Improveconfiguration data readback efficiencyVSAvoidencoding/decoding system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The PLD performs encoding of configuration data internally using its own processing resources (processor or encoder core) rather than requiring external encoding equipment. The system reads back configuration data, encodes it internally, and outputs the encoded data through peripheral interfaces, making the PLD self-sufficient for the encoding operation.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The PLD's processor or encoder core is utilized for multiple purposes: configuring the device during initialization and subsequently encoding configuration data during readback operations. This multi-functional use of existing resources improves readback efficiency without adding dedicated encoding hardware.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If internal encoder and peripheral interface are provided in PLD, then encoded data can be sent externally, but device complexity increases

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidinternal encoder and interface structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The peripheral interface acts as an intermediary component that bridges the internal encoder and external systems. Rather than creating complex direct connections between all internal components and external devices, the peripheral interface mediates data transmission, simplifying the overall system architecture while enabling versatile external communication.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If configuration data is obtained via internal interface and encoded before external transmission, then data integrity is enhanced, but processing time increases

Engineering Contradiction:
Improveconfiguration data integrityVSAvoidencoding and transmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The encoding process is performed continuously during the configuration data readback operation without interrupting the data flow. The processor or encoder core encodes data as it is read from configuration memory, maintaining a continuous pipeline operation that minimizes idle time and reduces overall processing time while ensuring data integrity through systematic encoding.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7689726B1Bootable integrated circuit device for readback encoding of configuration data
Publication Date: 2010.03.30 XILINX INC
  • US7689726B1 patent drawing
  • US7689726B1 patent drawing
  • US7689726B1 patent drawing

AI summary

Method and apparatus for encoding configuration data is described. An integrated circuit device having a configuration interface is coupled to boot memory coupled at the configuration interface. The boot memory contains boot cores for configuring the integrated circuit device via the configuration interface. The boot cores include a configuration encoder core and an internal processor interface core. The boot cores may further include a processor core. The configuration encoder core provides a peripheral interface internal to the integrated circuit device, and the boot memory contains at least one set of instructions for encoding configuration data read from configuration memory. The encoded configuration data may be sent via the peripheral interface. Alternatively, configuration encoder core may include a configuration bitstream for instantiating an encoder in configurable resources for encoding readback configuration data.