PLD Field Reconfiguration Without Data Loss or I/O Disruption
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Solution Overview
Problem
Conventional programmable logic devices (PLDs) face issues during reconfiguration, including entering a sleep state with disabled input and output pins, loss of data in volatile memory, and disruption of critical functions, which are unacceptable in critical applications.
Innovation Solution
The implementation of a programmable logic device with non-volatile memory to store configuration data and preserve volatile memory data during reconfiguration, allowing for background programming that maintains system operation and glitch-free output signals, using techniques like store-to-flash and known-state exit operations to prevent data loss and ensure seamless transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the PLD is reprogrammed in the field, then the device can be reconfigured with new functionality, but the PLD enters a sleep state with disabled input and output pins causing system interruption
Solution Approach 1:
The patent performs data backup to non-volatile memory before reconfiguration begins. This preliminary action ensures that volatile memory data is preserved, allowing the system to maintain operational continuity during the reprogramming process without entering a sleep state.
Solution Approach 2:
The patent uses non-volatile memory as an intermediary storage medium to temporarily hold data during reconfiguration. This intermediary structure allows data to be preserved outside the volatile memory while the PLD is being reprogrammed, preventing system interruption.
2Adaptability or versatility
If the PLD is reprogrammed, then new configuration can be loaded, but data stored in volatile memory is lost during the programming process
Solution Approach 1:
The system performs a preliminary backup of data from volatile memory to non-volatile memory before the reconfiguration process begins. This ensures that no data is lost during programming, as the original data is safely stored in non-volatile memory that is not affected by the reconfiguration process.
Solution Approach 2:
The patent creates a copy of the data stored in volatile memory and stores it in non-volatile memory. This copying mechanism ensures that the original data is preserved while the volatile memory can be reconfigured without data loss.
3Adaptability or versatility
If conventional reconfiguration is performed, then the PLD can be reprogrammed, but input and output pins are disabled during the process
Solution Approach 1:
The patent performs data backup and preservation operations before the reconfiguration process begins. This preliminary action allows the input and output pins to remain enabled and responsive throughout the reprogramming process, as the system has already prepared the necessary data preservation mechanisms.
Solution Approach 2:
The patent maintains continuous operation of the PLD during reconfiguration by preserving volatile memory data and keeping input/output pins enabled. The reconfiguration process occurs without interrupting the useful actions of the device, allowing pins to remain responsive throughout.
Data Source
AI summary
Systems and methods are disclosed herein to provide reconfiguration techniques for PLDs. For example, in accordance with an embodiment of the present invention, a programmable logic device includes logic blocks, input/output blocks, a volatile memory block, and configuration memory cells to store configuration data for configuration of the logic blocks, the input/output blocks, and the volatile memory block of the programmable logic device. The programmable logic device further includes circuit techniques for preventing loss of data stored in the volatile memory block due to a reconfiguration. Furthermore, for example, the programmable logic device may further prevent the loss of data stored in user registers or loss of input/output personality due to the reconfiguration.