PLD Register Data Retention During Reprogramming

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Solution Overview

Problem

Conventional programmable logic devices (PLDs) cannot preserve data stored in volatile memory during reprogramming, leading to data loss, and existing methods to retain data are time-consuming and complex.

Innovation Solution

Incorporating a system with programmable logic blocks, registers, and configurable routing resources to transfer user data to storage registers via a programmed data path during reprogramming, allowing data to be stored and retained during the process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional PLD reprogramming is performed, then the PLD can be reprogrammed with new configuration data, but data stored in volatile memory is lost

Engineering Contradiction:
Improvereprogramming capabilityVSAvoiddata loss in volatile memory
Core Design Contradiction:
Adaptability or versatilityVSLoss of information

Solution Approach 1:

The patent segments the memory system into configuration memory (for reprogramming) and volatile memory (for data retention), allowing independent operation of each segment during reprogramming processes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary actions by capturing and storing data in volatile memory before the reprogramming process begins, ensuring data is preserved before any configuration changes occur

Inventive Principle:
Principle #10Preliminary action

2Loss of information

If data is read from PLD and merged with new configuration data prior to reprogramming, then data can be preserved during reprogramming, but the process becomes time consuming and complex

Engineering Contradiction:
Improvedata preservationVSAvoidreprogramming process complexity
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent enables the PLD to perform self-service by internally managing data retention in volatile memory during reprogramming, eliminating the need for external systems to read, store, and merge data manually

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent merges the data retention function with the reprogramming process by allowing volatile memory to maintain data independently while configuration memory is updated, combining both functions in a single integrated system

Inventive Principle:
Principle #5Merging (Combining)

3Loss of information

If data is read from PLD and merged with new configuration data prior to reprogramming, then data can be preserved, but the process is time consuming

Engineering Contradiction:
Improvedata preservationVSAvoidreprogramming time
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The patent maintains continuity of useful action by keeping data continuously available in volatile memory throughout the reprogramming process, eliminating interruptions and manual data transfer operations that cause time delays

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7876125B1Register data retention systems and methods during reprogramming of programmable logic devices
Publication Date: 2011.01.25 LATTICE SEMICON CORP
  • US7876125B1 patent drawing
  • US7876125B1 patent drawing
  • US7876125B1 patent drawing

AI summary

Systems and methods provide register data retention techniques for a programmable logic device in accordance with one or more embodiments of the present invention. For example, in one embodiment, a programmable logic device includes a plurality of logic blocks adapted to generate user data during operation of the programmable logic device; a plurality of registers adapted to store the user data during a reprogramming operation of the programmable logic device; and configurable routing resources adapted to provide a programmed data path between the logic blocks and the registers.