PLD Security Fuse Layout for Testable Memory Locking
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Solution Overview
Problem
Existing single one-time-programmable (OTP) security fuses in programmable logic devices (PLDs) can render devices inoperable if accidentally programmed before final configuration data is set, and they lack testability, creating security loopholes that can be exploited.
Innovation Solution
Implementing a plurality of security fuses (OTP security bits) that can be programmed with logic states to selectively secure configuration data in non-volatile memory, allowing for testing and preventing accidental locking of the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single OTP security fuse is used to secure configuration data, then security is improved, but the device may be accidentally rendered inoperable and lacks testability
Solution Approach 1:
The patent divides the single security fuse into multiple security fuses (a plurality of OTP security bits). This segmentation allows the system to maintain security while enabling testability - during manufacturing, test patterns can be programmed into these multiple security bits to verify their operation without permanently locking the device. The segmented approach provides redundancy and control that a single fuse cannot offer.
2Reliability
If a single OTP security fuse is programmed before final configuration data is set, then security is improved, but the device becomes permanently inoperable
Solution Approach 1:
The patent enables security fuses to be programmed in advance during manufacturing with test patterns, rather than requiring them to be programmed at the final security stage. This preliminary action allows the security features to be tested and verified before the device is released, ensuring they work correctly without preventing future configuration changes. The preliminary programming is done with reversible test patterns, not final security patterns.
Solution Approach 2:
The patent provides a cushioning mechanism by using multiple security fuses with test patterns that can be programmed and verified beforehand. If something goes wrong during testing or manufacturing, the device can be reprogrammed because the test patterns are designed to be reversible. This beforehand cushioning prevents the catastrophic failure that occurs with a single fuse programmed too early.
3Reliability
If additional circuitry and override features are added to prevent accidental fuse programming, then security is improved, but loopholes are created that can be exploited
Solution Approach 1:
The patent extracts the security control function from complex override circuitry and implements it directly through the logic states of multiple OTP security bits. By using the security bits themselves to encode the security pattern and control security operations, the patent eliminates the need for additional complex control circuitry and override features. This simplification removes potential loopholes while maintaining strong security.
Data Source
AI summary
Methods and devices are disclosed herein to provide improved techniques for securing configuration data stored in non-volatile memories of programmable logic devices. For example, in accordance with an embodiment of the present invention, a programmable logic device includes a non-volatile memory adapted to store a plurality of configuration data. A plurality of security fuses are adapted to store a plurality of logic states. Control logic is adapted to selectively secure the configuration data within the non-volatile memory based on the logic states stored in the plurality of security fuses.