PLD SPI Interface for Configuration Chaining and Boot Flexibility
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Solution Overview
Problem
Conventional programmable logic devices (PLDs) face limitations due to the need for large numbers of dedicated I/O pins for manufacturer-specific programming interfaces, reducing available I/O pins for user-defined operations and lacking convenient ways to selectively boot from various configuration data sources, especially when interfacing with external non-volatile memories.
Innovation Solution
The implementation of a programmable logic device with a slave serial peripheral interface (SPI) port that receives and passes configuration data bitstreams between external devices, allowing for convenient programming and configuration through a master SPI port, enabling the use of SPI and JTAG interfaces to program both non-volatile and configuration memories with reduced pin requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If conventional PLDs use large numbers of dedicated I/O pins for manufacturer-specific programming interfaces, then programming capability is provided, but the number of I/O pins available for user-defined operation is significantly reduced
Solution Approach 1:
The patent implements a slave SPI port that can function both as a programming interface for configuration data and as a user-defined I/O port. This multi-functionality allows the same physical pin to serve dual purposes: receiving configuration bitstreams during programming mode and providing user-defined functionality during normal operation, thereby eliminating the need for separate dedicated programming pins and increasing the number of pins available for user operations.
Solution Approach 2:
The patent introduces an intermediary SPI interface block that mediates between external configuration devices and internal configuration memory. This intermediary structure enables programming functionality to be achieved through a standardized SPI protocol using fewer pins, as the SPI interface can operate in both master and slave modes and can be controlled through a small number of control signals, reducing the pin count required for programming compared to conventional dedicated programming interfaces.
2Quantity of substance
If conventional PLDs support simplified programming interfaces with lower pin counts, then more I/O pins are available for user operation, but convenient ways to selectively boot from various sources of configuration data are not provided
Solution Approach 1:
The patent implements dynamic boot source selection capability where the slave SPI port can be configured at runtime to receive configuration data from different sources. The system can selectively boot from internal non-volatile memory, external SPI devices, or other configuration sources by changing the operational mode of the SPI interface block, providing adaptability without requiring additional dedicated pins for each boot source.
Solution Approach 2:
The slave SPI port is designed to serve multiple functions: it can act as a programming interface for configuration data, a user-defined I/O port, and a boot source selection interface. This universal design allows the system to boot from various sources (internal memory, external SPI devices) through the same physical interface, providing boot source versatility without increasing pin count.
3Ease of operation
If conventional PLDs require external configuration devices for programming, then configuration data can be loaded, but reconfiguration time is increased and instant-on capability is not achieved
Solution Approach 1:
The patent implements instant-on capability by pre-loading configuration data into internal non-volatile memory during manufacturing or previous operation. The slave SPI port enables the device to boot directly from this pre-loaded configuration data without requiring external configuration devices at power-up, achieving instant-on operation. The SPI interface can still be used for reconfiguration when needed, but the preliminary loading of configuration data eliminates the need for external devices during normal boot operations.
Data Source
AI summary
Systems and methods are disclosed herein to provide an improved approach to the configuration of integrated circuits such as programmable logic devices (PLDs). In one example, a method of operating a PLD includes receiving a configuration data bitstream at a slave serial peripheral interface (SPI) port of a PLD from a master SPI port of a first external device. The method also includes passing the configuration data bitstream through the PLD from the slave SPI port of the PLD to a master SPI port of the PLD. The method further includes providing the configuration data bitstream from the master SPI port of the PLD to a slave SPI port of a second external device.