PLL Circuit Auto-Trimming for Stable VCO Frequency Limits

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Solution Overview

Problem

Conventional phase locked loop (PLL) circuits in semiconductor integrated circuits face challenges in maintaining desired frequency characteristics due to process and environmental variations, leading to potential lock failures and increased noise, especially when oscillating frequencies exceed the highest operating speed of the frequency divider.

Innovation Solution

The PLL circuit incorporates a phase frequency comparator, charge pump, loop filter, selector, voltage controlled oscillator, and adjustment unit, allowing for automatic adjustment of frequency sensitivity and upper limit frequency, ensuring the PLL operates within desired parameters even under variations, by setting the upper limit frequency lower than the highest operating frequency of the logic circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the oscillating frequency of the VCO is increased to achieve higher transmission speed, then the transmission speed is improved, but the frequency divider cannot operate properly and the PLL may not be locked

Engineering Contradiction:
Improvetransmission speedVSAvoidlock reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies dynamics by making the upper limit frequency adjustable through trimming. The VCO's frequency characteristic is dynamically adapted by changing the upper limit frequency setting according to process variations, allowing the system to maintain reliable operation at optimal speeds for each individual device.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of upper limit frequency through automatic trimming. By adjusting this parameter during calibration, the system optimizes the operating point to prevent lock failures while maintaining high transmission speed capability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If automatic trimming is performed to adjust the upper limit frequency and prevent lock failures, then lock reliability is improved, but the device complexity increases due to additional trimming circuits

Engineering Contradiction:
Improvelock reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service through automatic trimming functionality. The trimming circuit automatically adjusts the upper limit frequency without requiring manual intervention, and the adjustment results are stored in a register for automatic retrieval during operation, reducing the need for external calibration equipment.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent uses feedback by comparing the actual VCO frequency with the desired frequency range and automatically adjusting the upper limit frequency setting accordingly. The frequency divider provides feedback signals that enable the trimming circuit to optimize the operating point.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If the highest operating frequency of the analog circuit is limited to match the digital circuit speed, then manufacturing adaptability is improved, but the analog circuit performance is degraded

Engineering Contradiction:
Improvemanufacturing adaptabilityVSAvoidanalog circuit speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent applies dynamics by enabling the upper limit frequency to be adjusted according to process variations. This dynamic adjustment allows the analog VCO to adapt to different manufacturing conditions without being constrained by a fixed frequency limit, thereby maintaining both adaptability and performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the upper limit frequency parameter through trimming to optimize the balance between adaptability and performance. By adjusting this parameter, the system can accommodate process variations while maintaining high-speed operation capability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7504894B2Phase locked loop circuit and semiconductor integrated circuit device using the same
Publication Date: 2009.03.17 RENESAS ELECTRONICS CORP
  • US7504894B2 patent drawing
  • US7504894B2 patent drawing
  • US7504894B2 patent drawing

AI summary

To provide a phase locked loop circuit that is capable of performing an automatic adjustment that satisfies a desired characteristic not depending on a process variation and an environmental variation. The phase locked loop circuit has a phase frequency comparator, a charge pump, a loop filter, a frequency divider, a selector, and a voltage controlled oscillator. The frequency divider inputs an output signal and a reference signal, divides the output signal, and outputs a feedback signal, and also outputs a select signal, a trimming signal, and a limit signal from the output signal. The voltage controlled oscillator inputs the control voltage, the base voltage, the trimming signal, and the limit signal, changes the output signal frequency according to the control voltage so as to limit the upper limit frequency of the output signal. Also, the voltage controlled oscillator is capable of changing the frequency sensitivity of the output signal that is outputted with respect to the control voltage according to the trimming signal, and the upper limit frequency of the output signal according to the limit signal.