PLL Frequency Band Control for Stable VCO Phase Locking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing phase-locked loops (PLLs) face instability in frequency band adjustment due to manufacturing conditions and operation temperatures, leading to fluctuations in control voltage that prevent phase-locking at target frequencies, especially when response times of basic PLL circuits are longer than those of frequency band selectors.
Innovation Solution
A PLL system incorporating a frequency band controller with a comparator, stabilization controller, and up/down counter to manage oscillation control signals and critical time periods, ensuring stable frequency band adjustments by selectively updating frequency band selection digital values based on input clock signals and oscillation control signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the frequency band selector changes the frequency band each time the ringing/fluctuation peak exceeds a threshold, then the frequency band adjustment responds quickly to voltage changes, but the control voltage does not reach the target voltage and phase-locking becomes unstable
Solution Approach 1:
The patent introduces a response time generator that generates a critical time period signal before the frequency band selector acts. This preliminary timing control ensures that the frequency band is only changed after a predetermined response time has elapsed, allowing the basic PLL circuit to stabilize first. This prevents premature frequency band changes that would cause instability, while still maintaining relatively quick response through controlled timing.
2Productivity
If the response time of basic PLL circuits is not taken into consideration, then the frequency band selector can change frequency bands rapidly, but the output clock signal cannot be phase-locked at the target frequency
Solution Approach 1:
The patent implements a feedback mechanism where the critical time period signal generated by the response time generator is fed back to control the frequency band selector. The frequency band selector monitors this timing signal and only performs frequency band changes when the appropriate time has elapsed, creating a closed-loop control system that balances switching speed with phase-locking accuracy.
3Loss of time
If the frequency band selector operates faster than the basic PLL circuit response time, then frequency band changes occur rapidly, but the control voltage fluctuation cannot be properly reflected, causing unstable phase-locking
Solution Approach 1:
The patent uses periodic critical time period signals generated by the response time generator to control frequency band changes. Instead of continuous or random switching, the system employs periodic timing intervals that synchronize with the natural response characteristics of the basic PLL circuit, ensuring that frequency band changes occur at optimal moments when the control voltage has stabilized.
Data Source
AI summary
A phase-locked loop (PLL) for stably adjusting a frequency band of a voltage-controlled oscillator and a phase locking method. In the PLL, a frequency band controller alters the frequency band selection digital value in response to an input clock signal and an oscillation control signal generated from an LPF of a basic PLL circuit, and thus a voltage-controlled oscillator of the basic PLL circuit alters the frequency of an output clock signal in response to the oscillation control signal and the frequency band selection digital value. The output clock signal is rapidly and stably phase-locked at a target frequency depending on the frequency band selection digital value.