PLL Loop Bandwidth Correction Using Feedback Coefficient Modulation
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Solution Overview
Problem
Existing loop bandwidth correcting technologies for Phase Lock Loops (PLLs) fail to respond effectively to changes caused by semiconductor process variations, external components, power supply changes, and environmental conditions, limiting their performance and stability.
Innovation Solution
A PLL device with a correcting circuit that modulates the feedback coefficient between the feedback and reference signals, calculates the oscillation frequency based on phase difference crossovers, and adjusts control parameters to achieve precise digital correction of loop bandwidth, ensuring optimal performance across varying conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If preset loop bandwidth is used in PLL, then the PLL can operate with a fixed control parameter, but the loop bandwidth drifts under the effect of semiconductor process changes, external component changes, power supply changes, and environmental conditions
Solution Approach 1:
The patent implements a feedback mechanism where the actual loop bandwidth is measured and compared with the target loop bandwidth, and the difference is used to adjust the control parameter of the PLL. This closed-loop feedback system continuously compensates for drifts caused by semiconductor process changes, external component variations, power supply fluctuations, and environmental conditions, thereby maintaining stable loop bandwidth while adapting to changing conditions.
Solution Approach 2:
The patent dynamically changes the control parameter of the PLL based on the measured loop bandwidth and target loop bandwidth comparison. By adjusting the control parameter in response to detected deviations, the system maintains the desired loop bandwidth performance across varying operating conditions, resolving the contradiction between stability and adaptability.
2Reliability
If existing loop bandwidth correcting technologies are used, then some correction can be provided, but they fail to respond effectively to changes caused by semiconductor process variations, external components, power supply changes, and environmental conditions
Solution Approach 1:
The patent employs a continuous feedback mechanism that monitors the actual loop bandwidth and compares it with the target value, enabling the system to respond dynamically to changes caused by semiconductor process variations, external component changes, power supply fluctuations, and environmental conditions. This real-time feedback ensures reliable and effective correction across varying operational conditions.
Solution Approach 2:
The PLL system performs self-correction by automatically measuring its own loop bandwidth, comparing it with the target value, and adjusting its control parameter without external intervention. This self-service capability enables the system to maintain reliable performance and adapt to changes autonomously, improving both correction effectiveness and adaptability.
3Stability of the object's composition
If a correcting circuit is added to the PLL to enable dynamic adjustment of control parameters, then loop bandwidth correction is achieved, but the device complexity increases
Solution Approach 1:
The patent merges the loop bandwidth measurement function and the control parameter adjustment function into an integrated correcting circuit within the PLL. By combining these functions in a unified structure, the patent achieves loop bandwidth control while minimizing the increase in device complexity compared to having separate independent circuits for measurement and adjustment.
Solution Approach 2:
The correcting circuit in the patent serves multiple functions: it measures the loop bandwidth, compares it with the target value, and adjusts the control parameter. This multi-functional design reduces the overall device complexity by eliminating the need for separate dedicated circuits for each function, while still achieving stable loop bandwidth control.
Data Source
AI summary
A phase lock loop (PLL) device with correcting function of loop bandwidth and method thereof is related to the method including generating an output signal by a PLL circuit according to a reference signal and a feedback signal, modulating a feedback coefficient to unlock the feedback signal and the reference signal, detecting two valid crossovers of a phase difference between the reference signal and the feedback signal, calculating an oscillation frequency according to the two valid crossovers, and setting a control parameter of the PLL circuit according to the oscillation frequency. The feedback signal is related to the output signal, and there is the feedback coefficient between the feedback signal and the output signal.