PLL Loop Bandwidth Control for Low-EMI Spread Spectrum Clocks
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Solution Overview
Problem
The challenge is to improve jitter and noise properties of spread-spectrum processed clock signals while reducing electromagnetic interference (EMI) in semiconductor integrated circuits, where increasing loop bandwidth lowers peak levels but deteriorates jitter and noise, making it difficult to achieve simultaneous reduction in EMI and improvement in jitter and noise properties.
Innovation Solution
A spread-spectrum clock generator with a phase-locked loop (PLL) and a loop bandwidth controller that adjusts the PLL's loop bandwidth by controlling components such as the phase detector, loop filter, voltage-controlled oscillator, and frequency divider, in association with a spread spectrum controller, to generate clock signals with low jitter, low noise, and low peak levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the loop bandwidth of the PLL is increased to reduce EMI, then the peak level of the clock signal is lowered, but the jitter and noise properties of the clock signal deteriorate
Solution Approach 1:
The patent applies dynamics by making the loop bandwidth adjustable rather than fixed. The system dynamically changes the loop bandwidth of the PLL during operation to optimize both EMI reduction and jitter/noise properties. This is achieved through a loop bandwidth controller that can modify the bandwidth parameter based on system requirements, allowing the same PLL to operate effectively under different conditions without sacrificing either EMI performance or signal quality.
Solution Approach 2:
The patent implements parameter changes by modifying the loop bandwidth parameter of the PLL. By changing this critical parameter, the system can shift between different operational states: one optimized for EMI reduction (higher bandwidth) and another optimized for jitter and noise performance (lower bandwidth). This parameter adjustment mechanism enables the system to resolve the contradiction by selecting the appropriate bandwidth setting for each operational context.
2Reliability
If the loop bandwidth of the PLL is decreased to improve jitter and noise properties, then the jitter and noise are reduced, but the peak level increases and EMI reduction is compromised
Solution Approach 1:
The system uses dynamics to allow the loop bandwidth to be adjusted in response to different operational requirements. When jitter and noise properties need improvement, the bandwidth is decreased; when EMI reduction is the priority, the bandwidth is increased. This dynamic adaptability resolves the contradiction by enabling the system to switch between optimized states rather than being constrained to a single fixed bandwidth value.
Solution Approach 2:
The patent employs parameter changes by systematically adjusting the loop bandwidth parameter to achieve different performance trade-offs. By changing this parameter, the system can optimize for either jitter/noise performance or EMI reduction depending on the operational context, thus resolving the contradiction between these two competing requirements.
3Device complexity
If a fixed loop bandwidth is used in the PLL, then the system is simple to implement, but it cannot simultaneously achieve EMI reduction and good jitter and noise properties
Solution Approach 1:
The patent applies dynamics by introducing a controllable loop bandwidth mechanism that transforms the static PLL into a dynamic system. The loop bandwidth controller adds the capability to adjust the bandwidth parameter, enabling the system to adapt to different operational requirements. This dynamic feature allows simultaneous achievement of EMI reduction and good jitter/noise properties by selecting appropriate bandwidth settings, justifying the increased complexity through enhanced performance.
Solution Approach 2:
The system implements parameter changes by making the loop bandwidth adjustable rather than fixed. This parameter modification capability enables the PLL to optimize both EMI performance and jitter/noise properties according to specific operational needs. The ability to change the bandwidth parameter transforms a simple but limited fixed-bandwidth PLL into a more complex but versatile system that can achieve multiple performance goals simultaneously.
Data Source
AI summary
A spread spectrum controller (20) controls a PLL (10) so that the PLL outputs a spread-spectrum processed clock signal. A loop bandwidth controller (30) controls at least one of a phase detector (11), a loop filter (12), a voltage-controlled oscillator (13), and a frequency divider (14) in the PLL (10) during operation of the spread spectrum controller (20) to change a loop bandwidth of the PLL (10).