PLL Signal Generator Capacitor Calibration for Faster Settling
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Solution Overview
Problem
Signal generators with phase-locked loops face long calibration and settling times due to process, voltage, and temperature variations, which affect capacitor values, leading to suboptimal performance.
Innovation Solution
A method to control a signal generator by calculating and compensating for systematic capacitance errors in capacitors using the frequency lock and switching state, allowing for calibration of oscillator control subsystems to adjust for PVT variations, thereby shortening calibration times and improving settling characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If traditional phase-locked loop calibration is used without PVT compensation, then the signal generator can operate with simple circuitry, but the calibration time and settling time become excessively long due to capacitor value variations
Solution Approach 1:
The patent applies preliminary action by measuring and storing the systematic capacitance error of the first capacitor set during an initial calibration phase. This pre-measured error data is then used to compensate for PVT variations in subsequent operations, eliminating the need for repeated lengthy calibration procedures and significantly reducing calibration time while maintaining manageable circuit complexity
Solution Approach 2:
The patent implements feedback by using the measured systematic capacitance error to adjust and compensate for capacitor value variations caused by PVT effects. The calibration system continuously monitors frequency deviations and applies corrective adjustments based on the stored error data, creating a closed-loop system that maintains accuracy without requiring excessively long settling times
2Loss of time
If traditional phase-locked loop calibration is used without PVT compensation, then the circuit design remains simple, but the settling time becomes excessively long in worst-case process corners
Solution Approach 1:
The patent measures and stores the systematic capacitance error characteristics during an initial calibration phase, creating a lookup table or stored data structure that contains compensation information for various PVT conditions. This preliminary measurement eliminates the need for time-consuming real-time calibration during operation, significantly reducing settling time while keeping the circuit design relatively simple
Solution Approach 2:
The calibration system uses feedback from the measured systematic capacitance error to continuously adjust the oscillator frequency control. By comparing the actual frequency with the target frequency and applying corrections based on stored error data, the system achieves fast settling even in worst-case process corners without requiring overly complex circuitry
3Adaptability or versatility
If capacitor values are allowed to vary with PVT effects, then the circuit can operate across different conditions, but the frequency control precision deteriorates due to systematic capacitance errors
Solution Approach 1:
The patent converts the harmful effect of PVT-induced capacitance variations into a beneficial resource by measuring and storing the systematic error patterns. Instead of trying to prevent these variations, the system uses the stored error data to predict and compensate for them, transforming what was previously a source of inaccuracy into a means of achieving high precision frequency control across varying operating conditions
Solution Approach 2:
The patent changes the control parameter from direct capacitor value control to error compensation control. By measuring the systematic capacitance error and using this information to adjust the frequency control word or oscillator tuning, the system maintains precise frequency control despite physical capacitor value changes due to PVT effects, thereby preserving both adaptability and precision
Data Source
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AI summary
A signal generator (100) comprises a first set of capacitors (136, 138, 140) at least partially switchably connectable for adjusting a frequency of an oscillator (144) as part of a phase-locked loop (146), PLL) and a second set of capacitors comprised in one or more oscillator control subsystems (134, 118, 140). A method of controlling the signal generator (100) comprises: acquiring a frequency lock, ACQ, in the phase-locked loop (146); calculating, in conjunction with the acquiring of the frequency lock, a systematic capacitance error of the first set of capacitors due to process, voltage, and temperature variations, PVT, based on the frequency of the oscillator (144) and a switching state of the first set (136, 138, 140) of capacitors; and calibrating the one or more oscillator control subsystems (134, 118, 140) using the systematic capacitance error, thereby compensating for process, voltage, and temperature variations common between the first set of capacitors (136, 138, 140) and the second set of capacitors.