PLL Capacitor Array Switching for Fast Multi-Protocol Frequency Hops
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Solution Overview
Problem
Current frequency synthesizers for IoT devices face challenges in fast switching between frequencies, leading to reduced time for listening to multiple wireless protocols like Zigbee and BLE, due to increased product size, cost, and slow switching times, which limits concurrent listening capabilities.
Innovation Solution
A phase-locked loop (PLL) based frequency synthesizer with capacitor arrays for temperature and frequency compensation, allowing for rapid adjustment of capacitance to achieve fast frequency switching, settling in less than 10 μs, without the need for multiple radios or complex software solutions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple radios are integrated to support multiple wireless protocols, then protocol support capability is improved, but product size and cost increase
Solution Approach 1:
The patent implements a single radio frequency transceiver that can operate on multiple wireless protocols (IEEE 802.15.4 and Bluetooth Low Energy) by dynamically switching frequencies and protocols through a unified controller, eliminating the need for separate radio hardware for each protocol while maintaining full protocol support capability
Solution Approach 2:
The patent combines multiple protocol handling capabilities into a single integrated radio transceiver unit with shared hardware resources (antenna, frequency synthesizer, modulator/demodulator), allowing one physical device to perform functions that traditionally required multiple separate radios
2Loss of time
If frequency switching time is reduced to enable concurrent listening, then listening efficiency is improved, but frequency synthesis stability deteriorates
Solution Approach 1:
The patent pre-calculates and stores frequency control parameters (capacitance values for capacitor arrays, divider ratios) for all possible target frequencies in advance, allowing the frequency synthesizer to immediately switch to the correct configuration when a frequency change is requested, without performing time-consuming calculations during the switching event
Solution Approach 2:
The patent implements dynamic frequency switching capability where the frequency synthesizer can rapidly reconfigure its operating parameters (capacitor array connections, feedback divider settings) in response to real-time protocol switching requirements, enabling the system to adapt its frequency instantly based on which protocol is currently active
Data Source
AI summary
A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.