PLL Track-and-Hold Charge Pump for Dynamic Bandwidth Control
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Solution Overview
Problem
Analog phase-locked loops (PLLs) face challenges in bandwidth stabilization and tracking due to variations in supply voltage, temperature, and process variations, leading to uncertainty in voltage-controlled oscillator (VCO) gain and charge pump current, which affects phase noise, spur performance, and lock time.
Innovation Solution
Incorporating a bandwidth calibration circuit that adjusts the charge pump gain by modifying the pulse width, transconductance, or slew rate of the feedback signal, allowing the PLL to automatically adjust its bandwidth and maintain optimal performance across varying conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the charge pump current is increased to reduce lock time, then the lock acquisition speed improves, but the phase noise and spur performance deteriorate
Solution Approach 1:
The charge pump current is made dynamic rather than fixed. The control circuit adjusts the charge pump current based on the operating state of the PLL: using higher current during lock acquisition to reduce time, and lower current during steady-state operation to minimize phase noise and spurs. This dynamic adjustment resolves the contradiction between fast locking and clean signal performance.
Solution Approach 2:
The patent changes the parameter of charge pump current from a static value to a variable parameter controlled by the control circuit. By monitoring the lock detection signal and transitioning between acquisition mode and tracking mode, the system optimizes the charge pump current parameter to achieve both fast locking and low phase noise/spur performance at different operational phases.
2Adaptability or versatility
If the loop bandwidth is widened to improve tracking performance, then the phase tracking capability improves, but the phase noise increases
Solution Approach 1:
The loop bandwidth is made dynamic through the control circuit that adjusts the charge pump current. During acquisition, a wider effective bandwidth is achieved through higher current to enable faster locking. During tracking, the reduced current narrows the effective bandwidth to minimize phase noise while maintaining adequate tracking capability through the feedback mechanism.
Solution Approach 2:
The system transitions between different operational phases: acquisition phase with wider bandwidth characteristics, and tracking phase with narrower bandwidth characteristics. This periodic switching of operational modes allows the system to optimize performance for each phase, achieving both fast acquisition and low phase noise during tracking.
3Loss of time
If the charge pump current is increased to improve lock time, then the locking speed improves, but the power consumption increases
Solution Approach 1:
The charge pump operates in two distinct periodic phases: high-current mode during lock acquisition to minimize time, and low-current mode during steady-state tracking to minimize power consumption. The control circuit switches between these phases based on lock detection, ensuring optimal power-time tradeoff throughout the operational cycle.
Solution Approach 2:
The charge pump current is dynamically adjusted based on operational requirements rather than maintaining a constant high value. This dynamic control allows the system to consume high power only temporarily during acquisition, then transition to low-power operation during tracking, resolving the contradiction between fast locking and low power consumption.
Data Source
AI summary
Phase-locked loops (PLLs) are provided. A PLL includes a voltage-controlled oscillator (VCO), a frequency divider and a track-and-hold charge pump. The VCO is configured to provide an output clock corresponding to a pumping current. The frequency divider is configured to provide a feedback signal according to the output clock. The track-and-hold charge pump is configured to provide the pumping current according to a reference clock and the feedback signal. The track-and-hold charge pump includes a track-and-hold circuit, a pumping switch and a pulse width modulator (PWM). The track-and-hold circuit is coupled to the frequency divider and configured to sample the feedback signal according to the reference clock. The PWM is configured to provide a PWM signal to control the pumping switch according to the reference clock, so as to provide the pumping current corresponding to the sampled feedback signal.