PLL Charge Pump Gating During Dead Zone Periods

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Solution Overview

Problem

Voltage sampling type PLLs have high power consumption due to two feedback loops, which is a limitation in achieving efficient and low-power operation.

Innovation Solution

A circuit device with a first phase comparison circuit, a first charge pump circuit, a second phase comparison circuit with a dead zone detection circuit, and a second charge pump circuit, where the second charge pump circuit is disabled or set to low power consumption mode during the dead zone period, reducing unnecessary power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a voltage sampling type PLL with two feedback loops is used, then phase noise performance and frequency accuracy are improved, but power consumption increases

Engineering Contradiction:
Improvephase noise performanceVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic switching between two feedback loops based on operational conditions. The first feedback loop (voltage sampling type) is activated when high phase noise performance is required, while the second feedback loop (frequency sampling type) is activated when low power consumption is prioritized. This dynamic configuration allows the system to adapt its power consumption and performance characteristics according to real-time requirements, resolving the contradiction between maintaining high phase noise performance and reducing overall power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic switching between different feedback loop configurations based on predetermined conditions or time intervals. During certain operational periods, the voltage sampling type PLL is activated for optimal phase noise performance, while during other periods, the frequency sampling type PLL is activated for reduced power consumption. This periodic action enables the system to achieve both high performance and low power consumption across different operational phases.

Inventive Principle:
Principle #19Periodic action

2Reliability

If both feedback loops operate continuously, then phase locking accuracy is maintained, but unnecessary power consumption occurs during dead zone periods

Engineering Contradiction:
Improvephase locking accuracyVSAvoidwasteful power usage
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts and removes the second feedback loop from active operation during dead zone periods when phase locking accuracy is already sufficient. By detecting dead zone conditions and selectively disabling the second feedback loop during these periods, the system eliminates unnecessary power consumption while maintaining adequate phase locking accuracy when it matters most. This extraction principle allows the system to operate only when needed, avoiding wasteful energy loss during periods when the first feedback loop alone is sufficient.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12184293B2Circuit device and oscillator
Publication Date: 2024.12.31 SEIKO EPSON CORP
  • US12184293B2 patent drawing
  • US12184293B2 patent drawing
  • US12184293B2 patent drawing

AI summary

A circuit device includes: a first phase comparison circuit including a sampling circuit that samples a feedback signal based on a reference clock signal; a first charge pump circuit configured to output a current corresponding to a sampling voltage; a second phase comparison circuit including a dead zone detection circuit that detects whether a phase difference between the reference clock signal and a feedback clock signal falls within a dead zone, and configured to output a phase difference signal when the phase difference does not fall within the dead zone; a second charge pump circuit; and a clock signal generation circuit configured to generate the clock signal having a frequency controlled based on an output of the first charge pump circuit or the second charge pump circuit. The second charge pump circuit is set disabled or in a low power consumption mode in a dead zone period.