PLL Charge Scaling for Smaller Filter Capacitors With Low Jitter
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Solution Overview
Problem
Phase-locked loops (PLLs) in electronic devices are large and expensive to implement on integrated circuit chips, and reducing their size through conventional methods often results in increased jitter and noise or sacrifices performance characteristics.
Innovation Solution
A phase-locked loop with charge scaling, which includes a charge pump, a filter, and a charge manager that divides the charge applied to the filter capacitor, allowing a smaller filter capacitor size without significantly impacting performance by diverting a portion of the charge away from the filter capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the filter capacitor size is reduced to decrease PLL footprint, then area is improved, but jitter and noise increase
Solution Approach 1:
The charge from the charge pump is segmented into multiple portions using the charge manager. Instead of applying all charge to the filter capacitor, the charge manager divides it into several parts, with only a portion being applied to the filter capacitor. This segmentation allows the filter capacitor to be smaller while still maintaining adequate charge levels and performance characteristics.
Solution Approach 2:
The invention changes the charge application parameter by introducing a charge scaling mechanism. The charge manager dynamically controls the amount of charge applied to the filter capacitor, scaling it down from the full charge pump output. This parameter change enables the use of a smaller filter capacitor while maintaining the required voltage levels and reducing jitter and noise through optimized charge management.
2Ease of manufacture
If the filter capacitor size is reduced to lower cost, then manufacturing cost is improved, but performance characteristics are sacrificed
Solution Approach 1:
By segmenting the charge path and introducing the charge manager as an intermediate component, the system can use a smaller, less expensive filter capacitor. The charge manager ensures that the reduced capacitor size does not compromise performance by carefully controlling the charge application, thus achieving cost reduction without sacrificing reliability.
Solution Approach 2:
The charge manager acts as an intermediary between the charge pump and the filter capacitor. This intermediary component enables the use of a smaller filter capacitor by managing charge distribution, thereby reducing the cost of the filter capacitor while maintaining overall system performance through intelligent charge control.
3Area of moving object
If conventional methods are used to reduce PLL size, then area is improved, but jitter and noise increase
Solution Approach 1:
The charge segmentation approach allows for PLL size reduction while preventing jitter and noise generation. By dividing the charge into portions and applying it progressively to a smaller filter capacitor, the system avoids the harmful effects that would normally result from size reduction, maintaining signal quality while achieving compact dimensions.
Solution Approach 2:
The charge scaling parameter change enables the PLL to achieve a smaller size without generating excessive jitter and noise. The charge manager adjusts the charge application parameters to optimize the balance between size and signal quality, ensuring that the reduced PLL dimensions do not lead to harmful levels of jitter and noise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables a smaller footprint for the phase-locked loop on an integrated circuit chip while maintaining performance characteristics, reducing noise and jitter, and lowering costs by minimizing the size of the filter capacitor.
Implementation Method 1
The current-sampling capacitance circuitry is configured to receive the current signal from the charge pump and retain charge from the current signal to create stored charge
Implementation Method 2
the filter includes a filter capacitor
Data Source
AI summary
An integrated circuit is disclosed that implements a phase-locked loop with charge scaling. In an example aspect, the integrated circuit includes a charge pump, a filter, and a charge manager. The charge pump generates a current signal, and the filter includes a filter capacitor. The charge manager is coupled between the charge pump and the filter. The charge manager includes current-sampling capacitance circuitry and a charge manager controller that is coupled to the current-sampling capacitance circuitry. The current-sampling capacitance circuitry receives the current signal from the charge pump and retains charge from the current signal to create stored charge, with the stored charge including a first charge portion and a second charge portion. The charge manager controller causes the current-sampling capacitance circuitry to communicate the first charge portion to the filter capacitor and causes the current-sampling capacitance circuitry to divert the second charge portion away from the filter capacitor.