PLL Spread-Spectrum Clock Modulation for EMI Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-speed electronic equipment generates excessive electromagnetic interference (EMI), which is challenging to manage due to increased frequency operations and long wire traces on printed circuit boards, leading to compliance issues with EMI emission standards like those set by the FCC.
Innovation Solution
A spread-spectrum clock generator is developed, comprising a phase-locked loop circuit and a modulation circuit that controls the frequency of a clock signal, spreading it over a broader frequency band to minimize EMI levels by varying the output frequency between predetermined boundaries, using a phase-locked loop with a pre-divider, loop-divider, phase detector, charge pump, and voltage-controlled oscillator, and a modulation circuit that adjusts the frequency variation rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock frequency is increased to enable high-speed electronic equipment operation, then the processing speed and performance are improved, but the electromagnetic interference (EMI) level increases and exceeds FCC emission limits
Solution Approach 1:
The patent implements dynamic frequency modulation by varying the clock frequency within a range (Fc±ΔF) rather than maintaining a fixed frequency. The phase-locked loop circuit continuously adjusts the output frequency according to a modulation signal, creating a time-varying frequency profile that spreads spectral energy. This dynamic approach allows the system to operate at high average frequencies while preventing concentrated EMI peaks at any single frequency point.
Solution Approach 2:
The patent changes the frequency parameter of the clock signal from a constant value to a time-varying value. By modulating the frequency according to a predetermined profile (such as triangular or sinusoidal modulation), the spectral energy is distributed across a broader frequency band. This parameter transformation converts a monochromatic high-frequency signal into a spread-spectrum signal that meets EMI regulations while maintaining high-speed operation capabilities.
2Object-generated harmful factors
If the clock frequency is spread over a broader frequency band to reduce peak EMI energy, then compliance with FCC standards is achieved, but the concentration of clock energy at the fundamental frequency is reduced
Solution Approach 1:
The patent employs a phase-locked loop (PLL) circuit that provides feedback control to maintain clock signal integrity during frequency modulation. The PLL continuously compares the modulated output frequency with a reference frequency and adjusts the voltage-controlled oscillator to maintain the desired frequency relationship. This feedback mechanism ensures that despite the frequency spreading, the clock signal maintains its timing precision and structural integrity, preventing signal degradation that would compromise system reliability.
Solution Approach 2:
The patent implements periodic frequency modulation where the clock frequency varies in a regular, predictable pattern (such as triangular or sinusoidal waveforms). This periodic action creates a structured spread-spectrum signal where energy is distributed in a controlled manner across frequency bands. The regularity of the modulation ensures that the clock signal maintains its fundamental characteristics while achieving EMI reduction, as the periodic nature preserves timing relationships essential for digital circuit operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces EMI levels by distributing the clock energy across a broader frequency band, ensuring compliance with EMI emission standards and minimizing interference with nearby components, thereby enabling higher-speed electronic circuitry without exceeding regulatory limits.
Implementation Method 1
a phase-locked loop circuit receiving a reference signal at a reference frequency and outputting an output signal at an output frequency periodically varying in a range between upper boundary and lower boundary frequencies
Implementation Method 2
a voltage controlled oscillator outputting the output signal
Implementation Method 3
The modulation circuit receives the reference and the output signals, controls a period of the output frequency according to the reference frequency, and modulates a variation rate of the output frequency
Data Source
AI summary
A spread spectrum clock generator comprising a phase-locked loop circuit and a modulation circuit. The phase-locked loop circuit receives a reference signal at a reference frequency and outputs an output signal at an output frequency periodically varying in a range between upper predetermined boundary and lower predetermined boundary frequencies. The modulation circuit receives the reference and the output signals, controls a period of the output frequency according to the reference frequency, and modulates a variation rate of the output frequency according to the reference frequency, and the output frequency, and the predetermined integers.