PLL Clock Generator With Phase Modulation for EMI Reduction

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Solution Overview

Problem

Conventional methods for reducing Electronic Magnetic Interference (EMI) in systems, such as EMI filters and shielding, are inefficient and costly, particularly due to the high EMI generated by system clocks like frequency timing generators and crystal oscillators.

Innovation Solution

The development of a spread spectrum clock generator using a phase locked loop, delay line, and modulation unit to modulate the phase of input clocks, allowing for a fractional division of the output clock frequency, thereby reducing EMI through a controlled frequency variation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If conventional EMI prevention measures (EMI filters, ferrite beads, shielding) are used, then EMI protection is provided, but system cost and complexity increase

Engineering Contradiction:
ImproveEMI protectionVSAvoidsystem complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies spread spectrum clock modulation to intentionally spread the clock signal energy across a wider frequency range, converting the harmful concentrated EMI into a beneficial distributed low-level signal that complies with regulatory standards while reducing peak EMI emissions

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the temporal and spectral parameters of the clock signal by applying phase modulation and frequency spreading, transforming a fixed-frequency high-amplitude signal into a variable-frequency low-amplitude signal that reduces EMI without requiring additional physical shielding or filtering components

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If conventional EMI prevention measures are used, then EMI protection is provided, but implementation time increases

Engineering Contradiction:
ImproveEMI protectionVSAvoidtime-to-market
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The patent incorporates EMI reduction functionality directly into the clock generator circuitry itself, performing the EMI mitigation action preliminarily at the source before signals propagate through the system, thereby eliminating the need for subsequent retrofits with shields and filters that would extend time-to-market

Inventive Principle:
Principle #10Preliminary action

3Object-affected harmful factors

If conventional EMI prevention measures are used, then EMI protection is provided, but system cost increases

Engineering Contradiction:
ImproveEMI protectionVSAvoidsystem cost
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent converts the clock signal itself into the EMI solution by using spread spectrum modulation techniques, eliminating the need for expensive passive EMI components such as ferrite beads, EMI filters, and metal shielding that would increase manufacturing costs

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent extracts the EMI reduction function from separate physical components and integrates it directly into the clock generator's signal generation process, removing the need for additional EMI mitigation components and their associated costs

Inventive Principle:
Principle #2Taking out (Extraction)

4Object-affected harmful factors

If spread spectrum clock modulation is applied, then EMI is reduced, but clock signal frequency stability may be affected

Engineering Contradiction:
ImproveEMI reductionVSAvoidfrequency stability
Core Design Contradiction:
Object-affected harmful factorsVSStability of the object's composition

Solution Approach 1:

The patent employs periodic pseudorandom modulation patterns that systematically vary the clock frequency around a center frequency, ensuring that the average frequency remains stable while peak EMI emissions are reduced through controlled periodic spreading of spectral energy

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent uses feedback control mechanisms to monitor and adjust the modulated clock signal, ensuring that the spread spectrum operation maintains the desired average frequency and phase relationships, thereby preserving frequency stability while achieving EMI reduction

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces EMI by modulating the phase of input clocks, allowing the output clock frequency to be locked at a desired level, enhancing compliance with regulatory standards and reducing costs while maintaining system performance.

Implementation Method 1

a modulation unit integrates an input signal with a constant level to generate a modulation signal

Methodology Applied
Scientific EffectIntegration:

Implementation Method 2

a delay line is modulated by the modulation signal to modulate a phase of a first input clock signal

Methodology Applied
Scientific EffectPhase modulation: Phase Modulation

Implementation Method 3

a phase locked loop generates an output clock signal, and a frequency of the output clock signal is locked at a desired frequency

Methodology Applied
Scientific EffectPhase locked loop:

Data Source

PatentUS8644441B2Clock generators and clock generation methods thereof
Publication Date: 2014.02.04 MEDIATEK INC
  • US8644441B2 patent drawing
  • US8644441B2 patent drawing
  • US8644441B2 patent drawing

AI summary

Clock generators are provided. A phase locked loop generates an output clock, a delay line is coupled to an input of the phase locked loop, and a modulation unit integrates an input signal with a constant level to generate a modulation signal controlling the delay line, thereby modulating a phase of a first input clock of the phase locked loop, such that frequency of the output clock is locked at a desired frequency.