PLL Clock Recovery with Phase Shift Compensation for Jitter
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Solution Overview
Problem
Conventional phase-locked loop (PLL) systems are susceptible to sudden changes in the input reference signal, leading to excessive frequency and phase variations, causing jitter and wander in the output signal, which can result in bit slips and dropouts at the client receiver, especially when handling payloads with higher justification count values beyond +/â1.
Innovation Solution
A phase shifting element is introduced within the feedback loop of the PLL system to compensate for sudden changes in the input reference clock, using a justification count and buffer depth to generate a frequency offset, allowing for accurate clock recovery independent of the justification count value, thereby reducing jitter and accommodating various payload types.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PLL systems are used to extract client signal clock, then the system structure is simple and easy to implement, but the system is susceptible to sudden changes in input reference signal causing excessive frequency and phase variations resulting in jitter and wander
Solution Approach 1:
A phase shifting element is introduced as an intermediary component within the PLL feedback loop. This element receives the VCO output signal, applies phase adjustment based on justification count values, and feeds the adjusted signal back to the phase detector. The phase shifting element acts as a mediator that compensates for sudden reference signal changes without requiring complete system redesign.
Solution Approach 2:
The system dynamically adjusts the phase shift amount based on the justification count value. When sudden changes in the reference signal are detected (indicated by non-zero justification counts), the phase shifting element automatically modifies the feedback signal phase to compensate. This dynamic adaptation allows the PLL to maintain lock and reduce jitter/wander while handling various payload types with different justification count requirements.
2Adaptability or versatility
If justification count values beyond +/â1 are used to handle diverse payload types, then the system adaptability improves, but the jitter and wander problems worsen due to excessive frequency and phase variations
Solution Approach 1:
The phase shifting element performs preliminary phase adjustment on the feedback signal before it reaches the phase detector. By pre-compensating for the phase variations caused by high justification count values, the system prevents excessive frequency and phase variations from developing. This preliminary action allows the PLL to accurately track client signal clocks for diverse payload types while maintaining signal integrity and minimizing jitter/wander.
3Speed
If the input reference signal frequency changes suddenly, then the system responds quickly to frequency variations, but excessive frequency and phase variations occur causing bit slips and dropouts
Solution Approach 1:
The phase shifting element enhances the feedback mechanism by continuously monitoring the justification count value and dynamically adjusting the feedback signal phase. When sudden reference signal changes occur, the phase shifting element provides immediate compensatory phase adjustment, preventing excessive frequency and phase variations. This improved feedback loop maintains both fast frequency tracking capability and bit slip prevention, allowing the system to respond quickly while maintaining reliability.
Data Source
AI summary
The present invention provides a system, apparatus and method for recovering a client signal clock. The present invention is able to more effectively remove jitter within a clock signal by providing a phase shifting element in the feedback of a PLL system to compensate for sudden changes in an input reference clock. The PLL system provides flexible clock recovery so that it can accommodate various payload types because it extracts a client clock signal independent of a corresponding justification count number.