PLL Reference Clock Switching at Peak Frequency to Limit Overshoot

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Solution Overview

Problem

High-speed serial computer expansion bus standards, such as PCI Express, face challenges in maintaining stable frequency management during transitions between local crystal and recovery clocks, leading to signal overshoot and compromised data transmission quality.

Innovation Solution

A controller is implemented in retimers to identify a temporal range where the recovery clock reaches its peak frequency, allowing smooth switching from the local crystal clock to the recovery clock, thereby minimizing signal overshoot and ensuring compliance with frequency variation tolerances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the retimer switches between local crystal clock and external reference clock, then the retimer can operate with different clock sources for flexibility, but signal overshoot occurs and transmission stability deteriorates

Engineering Contradiction:
Improveclock source switching capabilityVSAvoidsignal transmission stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system performs preliminary frequency adjustment of the external reference clock before switching occurs. The frequency of the external reference clock is adjusted in advance to match the operating frequency, ensuring that when the switch happens, there is no frequency mismatch that would cause signal overshoot. This preliminary frequency alignment resolves the contradiction by maintaining stability during the switching operation.

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If the retimer uses a stable local crystal clock, then frequency stability is maintained, but switching to recovery clock causes excessive signal overshoot

Engineering Contradiction:
Improvefrequency stabilityVSAvoidsignal overshoot
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The system dynamically changes the frequency parameter of the external reference clock to match the stable frequency of the local crystal clock before switching. By adjusting the frequency parameter in advance, the system eliminates the harmful frequency mismatch that would otherwise cause signal overshoot when transitioning from the stable local crystal clock to the recovery clock.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If the retimer switches to recovery clock with spread-spectrum clocking, then frequency variation tolerance is improved, but signal overshoot increases during transition

Engineering Contradiction:
Improvefrequency variation toleranceVSAvoidsignal overshoot during switching
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The system performs preliminary frequency adjustment of the spread-spectrum recovery clock to match the operating frequency before the switch occurs. This advance frequency alignment ensures that even though the recovery clock has spread-spectrum characteristics for frequency variation tolerance, the actual switching moment occurs at matched frequencies, preventing signal overshoot while maintaining the frequency adaptability benefits.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12052020B2Methods and systems for controlling frequency and phase variations for PLL reference clocks
Publication Date: 2024.07.30 PARADE TECHNOLOGIES LTD
  • US12052020B2 patent drawing
  • US12052020B2 patent drawing
  • US12052020B2 patent drawing

AI summary

This application is directed to frequency controlling in an electronic device that includes a selector, a clock generated, and a controller. The selector selects one of a first reference signal and a second reference signal as an input signal having an input phase. The clock generator receives the input signal and generates a periodic signal, and the periodic signal has an output phase that matches the input phase of the input signal. While the first reference signal is selected as the input signal, the controller identifies a temporal range including a peak instant at which the second reference signal reaches a peak frequency, select a switching instant within the temporal range based on a known temporal position of the peak instant with respect to the temporal range, and control the selector to select the second reference signal as the input signal at the switching instant.