PLL Reference Clock Switching for Stable Retimer Frequency Control
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Solution Overview
Problem
High-speed serial expansion bus standards, such as PCI Express, face challenges with unstable retimer performance due to switching between local crystal and external reference clocks, leading to signal overshoot and compromised data transmission quality.
Innovation Solution
A controller is introduced to manage the switching between local crystal and recovery clocks by identifying a temporal range where the recovery clock reaches its peak frequency, allowing smooth transitions without signal overshoot, using a selector, clock generator, and controller to synchronize data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the retimer switches between local crystal clock and external reference clock, then the retimer can adapt to different operating modes and extend channel reach, but the switching causes signal overshoot and unstable performance
Solution Approach 1:
The system performs preliminary frequency adjustment of the external reference clock before switching occurs. The controller monitors the frequency of the external reference clock and pre-adjusts it to match the local crystal clock frequency, ensuring a smooth transition without signal overshoot when switching between clock sources
Solution Approach 2:
The system implements a feedback mechanism where the controller continuously monitors the frequency of the external reference clock and adjusts it in real-time. This feedback loop ensures that the external reference clock frequency matches the local crystal clock frequency before and during the switching process, preventing signal instability
2Length of stationary object
If the external reference clock is used for data transmission, then channel reach is extended, but frequency variation exceeds the tolerance of high-speed serial bus standards
Solution Approach 1:
The system dynamically changes the frequency parameter of the external reference clock to match the local crystal clock frequency. The controller adjusts the external reference clock frequency in real-time to ensure it falls within the tolerance range specified by high-speed serial bus standards, maintaining frequency accuracy while extending channel reach
3Reliability
If the retimer uses a stable local crystal clock, then signal stability is maintained, but channel reach extension capability is limited
Solution Approach 1:
The controller acts as an intermediary between the local crystal clock and the external reference clock. It monitors both clock sources, pre-adjusts the external reference clock frequency to match the stable local crystal clock, and manages the switching process to maintain signal stability while enabling channel reach extension through the external reference clock
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures stable frequency management, reducing signal overshoot and maintaining data transmission quality within high-speed serial computer expansion bus standards, thereby enhancing data link performance.
Implementation Method 1
the recovery clock is modulated with spread-spectrum clocking (SSC)
Data Source
AI summary
This application is directed to frequency controlling in an electronic device (e.g., a retimer of a data link). The electronic device includes a selector, a clock generated, and a controller. The selector selects one of a first reference signal and a second reference signal as an input signal having an input phase. The clock generator receives the input signal and generates a periodic signal with reference to the input signal, and the periodic signal has an output phase that matches the input phase of the input signal. While the first reference signal is selected as the input signal, the controller determines whether the second reference signal is in a temporal range in which the second reference signal reaches a peak frequency and controls the selector to select the second reference signal as the input signal in accordance with a determination that the second reference signal is in the temporal range.