PLL Reference Current Compensation for PVT-Stable Ring Oscillators
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Solution Overview
Problem
Phase locked loop (PLL) circuits in semiconductor devices are vulnerable to variations in process, voltage, and temperature (PVT), leading to performance instability and increased area requirements due to the sensitivity of ring oscillators to external changes.
Innovation Solution
Implementing a phase locked loop circuit with a reference current generator that generates a summed compensation current to counteract PVT variations, using a pair of band gap reference circuits and a weighted current mirror to average compensation currents, and a current digital-to-analog converter to adjust control currents, thereby stabilizing the oscillator's frequency output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a ring oscillator is used to implement a low noise and low power PLL circuit, then power consumption and noise are reduced, but the circuit becomes vulnerable to external changes (PVT variation and supply voltage noise)
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the reference current based on detected PVT variations. The compensation circuit modifies current parameters in response to temperature, process, and voltage changes, allowing the ring oscillator to maintain stable frequency operation across varying conditions while preserving low power consumption characteristics.
2Illumination intensity
If a ring oscillator is used to implement a low noise and low power PLL circuit, then noise and power are reduced, but the circuit becomes vulnerable to supply voltage noise
Solution Approach 1:
The patent implements feedback mechanisms where the compensation circuit continuously monitors supply voltage variations and adjusts the reference current accordingly. This feedback loop allows the system to counteract the effects of supply voltage noise on the ring oscillator, maintaining signal integrity and reducing noise impact while preserving the inherent low noise characteristics of the ring oscillator architecture.
3Reliability
If conventional compensation methods are used to address PVT variation, then some stability is improved, but the area occupied by the device increases
Solution Approach 1:
The patent merges the compensation functionality with the existing PLL circuit structure by integrating the compensation circuit to share the reference current path. This consolidation approach allows PVT compensation to be achieved without adding separate, area-intensive compensation circuits, thereby improving stability while minimizing the increase in device area through efficient resource sharing.
Data Source
AI summary
A phase locked loop circuit and a semiconductor device are provided. The phased locked loop circuit includes a reference current generator configured to generate a summed compensation current in which at least one of a process change, a temperature change or a power supply voltage change are compensated and output the summed compensation current as a reference current, a current digital-to-analog converter configured to convert the reference current into a control current in accordance with a digital code and a voltage control oscillator configured to generate a signal based on the control current, wherein the summed compensation current is based on weighted-averaging a first type compensation current and a second type compensation current in response to at least one of the process change, the temperature change or the power supply voltage change.