Digital PLL DCO Capacitance Switching for FMCW Chirp Resolution
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Solution Overview
Problem
Digitally controlled oscillator (DCO) circuits face challenges in efficiently controlling frequency resolution for varying chirp bandwidths in radar applications, leading to suboptimal performance in both long-range and short-range radar systems due to limitations in capacitance value steps and phase noise management.
Innovation Solution
The implementation of a digital phase locked loop (PLL) circuit with a DCO that sequences through different capacitance value steps for different chirp bandwidths, allowing the frequency resolution to be tuned according to the selected level of capacitance, optimizing the tuning range for both long-range and short-range radar applications by using programmable capacitive circuits and banks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed frequency resolution is used in the DCO circuit, then the circuit structure is simple, but the performance is suboptimal for both long-range and short-range radar applications
Solution Approach 1:
The patent implements dynamic frequency resolution control by making the DCO circuit switch between different capacitance value steps based on the selected chirp bandwidth. The control circuit dynamically adjusts the frequency resolution parameter, allowing the same hardware to adapt to both long-range radar (requiring fine resolution) and short-range radar (allowing coarser resolution) applications without physical reconfiguration
Solution Approach 2:
The patent changes the frequency resolution parameter of the DCO circuit by selecting different capacitance value steps from a programmable capacitive array. By varying the capacitance values in the DCO, the frequency resolution is adjusted according to the required chirp bandwidth, enabling optimal performance across different radar ranges while using the same hardware structure
2Measurement precision
If fine frequency resolution is used for long-range radar, then range resolution is improved, but the chirp bandwidth for short-range radar is limited
Solution Approach 1:
The control circuit dynamically selects appropriate capacitance value steps based on the radar application type. For long-range radar, it selects finer capacitance steps to achieve high range resolution. For short-range radar, it switches to coarser capacitance steps that enable larger chirp bandwidths, thus optimizing performance for each specific application without compromising the other
Solution Approach 2:
The patent changes the frequency resolution parameter of the DCO by programming different capacitance values in the capacitive array. This parameter adjustment allows the system to achieve fine frequency steps for long-range detection when needed, and coarser frequency steps for short-range applications requiring broader bandwidth, thereby resolving the contradiction between measurement precision and adaptability
3Measurement precision
If the DCO sequences through many capacitance value steps for fine frequency resolution, then frequency resolution is improved, but phase noise increases
Solution Approach 1:
The patent optimizes the capacitance value step selection to achieve the required frequency resolution with the minimum necessary number of steps. By carefully choosing capacitance values that provide adequate frequency resolution for the specific radar application, the system avoids excessive sequencing operations that would generate harmful phase noise, thus resolving the contradiction between measurement precision and harmful factor generation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces phase noise and optimizes frequency resolution, enabling better range resolution and target detection in long-range radar while accommodating higher chirp bandwidths with relaxed resolution requirements for short-range radar, thereby enhancing the overall performance of FMCW radar transceivers.
Implementation Method 1
The DCO circuit has a frequency resolution that is tuned relative to the selected chirp BW, the frequency resolution configured in response to a selected level of capacitance
Data Source
AI summary
An example apparatus (100) is for use for use with front-end circuitry (102) to transmit and receive radar wave signals, The apparatus (100) includes digital phase locked loop (PLL) circuitry (104) and a control circuit (106). The digital PLL circuitry (106) provides a chirp sequence with frequency modulated continuous wave signals (FMCW), the FMCW signals being chirps containing a start frequency and a stop frequency, representing a selected chirp bandwidth (BW). The digital PLL circuitry (104) includes the DCO circuit (108) which frequency resolution is configured and arranged to be tuned relative to the selected chirp BW, the frequency resolution configured in response to a selected level of capacitance. The control circuit (106) controls the selected level of capacitance used by the DCO circuit (108) by changing the frequency resolution of the DCO according to the selected chirp BW, wherein different frequency resolutions are used for a first selected chirp BW and for a second selected chirp BW.