Differential High-Gain PLL Detector for Low-Offset Phase Noise
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Solution Overview
Problem
High gain phase detector techniques for phase-locked loops (PLLs) are sensitive to process and temperature variations, voltage supply noise, and limited supply voltage, which degrades PLL jitter performance and phase noise at low frequency offsets.
Innovation Solution
A fully differential loop filter structure with high gain phase detectors of opposite polarity for supply rejection, combined with a delta-sigma modulator to reduce quantization noise, and a digital-to-time converter to minimize noise folding, while using charge pump techniques to boost the effective supply voltage and reduce sensitivity to supply noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high gain phase detector techniques are used to achieve low phase noise at low frequency offsets, then phase noise performance is improved, but sensitivity to supply noise and process/temperature variations worsens
Solution Approach 1:
The phase detector is divided into multiple parallel detectors with different gain characteristics. By segmenting the detection function across multiple units, the system achieves high effective gain while distributing and reducing the impact of supply noise and process variations on any single detector, thus maintaining low phase noise without excessive sensitivity to harmful factors
Solution Approach 2:
The invention dynamically adjusts the gain parameter of the phase detector based on operating conditions such as supply voltage and temperature. By changing the gain parameter adaptively, the system maintains optimal phase noise performance across varying conditions while compensating for supply noise and process/temperature variations through feedback control mechanisms
2Power
If slope-based sampling PD structure is used to achieve high gain, then phase detector gain is improved, but process and temperature sensitivity worsens
Solution Approach 1:
A feedback mechanism is implemented to monitor and compensate for process and temperature variations affecting the slope-based sampling PD gain. The system measures actual gain deviations and adjusts operating parameters accordingly, maintaining stable gain performance despite PT variations while preserving the high gain capability of the slope-based structure
Solution Approach 2:
The phase detector combines multiple detection mechanisms with complementary characteristics - integrating the high gain slope-based sampling approach with more stable detection methods. This composite structure leverages the strengths of each approach, achieving high overall gain while the diverse composition provides resistance to process and temperature sensitivity
3Stability of the object's composition
If Up/Down RC charging circuits are used to achieve PT robust gain, then gain stability against PT variations is improved, but supply voltage limitation worsens
Solution Approach 1:
The system transitions from purely analog RC charging circuits to a hybrid approach incorporating digital processing dimensions. By sampling and digitally processing the phase detection signals, the system achieves PT robust gain stability while the digital domain provides immunity to supply voltage variations, effectively adding a new dimension that overcomes supply voltage limitations
4Measurement precision
If high gain phase detectors are used to reduce detector noise, then detector noise is reduced, but supply noise sensitivity worsens
Solution Approach 1:
The high gain detection function is segmented across multiple parallel phase detectors rather than relying on a single high-gain detector. This segmentation reduces the supply noise sensitivity of each individual detector while maintaining high effective gain through constructive combination of their outputs, thus achieving low detector noise without proportional increase in supply noise sensitivity
Data Source
AI summary
In described examples, a feedback loop has phase detection (PD) circuitry that has a reference input to receive a reference frequency signal, a feedback input to receive a feedback signal, and phase difference outputs. A phase to digital converter (P2DC) includes a first phase to charge converter (PCC) that has a gain polarity and a first phase error output; a second PCC that has an opposite gain polarity and a second phase error output. A differential loop filter has an amplifier with an inverting input coupled to the first phase error output and a non-inverting input coupled to the second phase error output. An analog to digital converter (ADC) has an input coupled to an output of the differential loop filter. A feedback path is coupled to the output of the P2DC, with an output of the feedback path providing the feedback signal to the PD feedback input.