PLL Digital Loop Filter With Small-Capacitor RC Impedance

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Solution Overview

Problem

In integrated circuit devices, the large size of capacitors in loop filters of phase-locked loops (PLLs) required for maintaining stability occupies significant die area, especially when the bandwidth is small, as they need to be very large to meet stability criteria.

Innovation Solution

The implementation of a digital filter with an analog-to-digital (ADC) converter and a digital-to-analog (DAC) converter, along with a parallel resistor and capacitor impedance element, where the capacitor can be as small as less than 500 pF, replaces the traditional RC loop filter, allowing for reduced die area usage while maintaining loop stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If a traditional RC loop filter is used in a phase-locked loop to maintain loop stability, then the loop stability is improved, but the capacitor size becomes very large occupying considerable die area

Engineering Contradiction:
Improveloop stabilityVSAvoidcapacitor die area
Core Design Contradiction:
Stability of the object's compositionVSArea of stationary object

Solution Approach 1:

The patent changes the parameters of the loop filter by replacing the traditional analog RC filter with a digital filter implementation. The digital filter uses an ADC to convert the control voltage to digital, processes it through digital filtering algorithms, and converts back to analog via DAC. This parameter change from analog to digital domain allows achieving the same filtering function with much smaller capacitor values (less than 500 pF) while maintaining loop stability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the mechanical/analog RC filtering mechanism with a digital signal processing mechanism. Instead of relying on large passive RC components for frequency selection and stability, the system uses digital algorithms implemented in the digital filter block to achieve the same stability function, thereby eliminating the need for large physical capacitors.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If the bandwidth of the PLL is made relatively small to improve frequency stability, then the frequency stability is improved, but the capacitor size must be increased to maintain loop stability

Engineering Contradiction:
Improvefrequency stabilityVSAvoidcapacitor die area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies parameter changes by transitioning the loop filter operation from analog to digital domain. This allows the system to achieve small bandwidth operation with stable frequency performance without requiring large capacitor values. The digital filter can precisely control the bandwidth and stability characteristics through digital parameters rather than being constrained by physical capacitor sizes.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9236871B1Digital filter for phase-locked loop integrated circuits
Publication Date: 2016.01.12 RENESAS ELECTRONICS AMERICA INC
  • US9236871B1 patent drawing
  • US9236871B1 patent drawing
  • US9236871B1 patent drawing

AI summary

A digital filter for a frequency synthesizer (e.g., PLL, UFT) may include an analog-to-digital (ADC) converter, which is responsive to a control voltage at an input thereof, and a digital-to-analog (DAC) converter, which has an input responsive to a signal generated at an output of the ADC. An impedance element is provided between the DAC and ADC. The impedance element has real and reactive components, a first current carrying terminal electrically coupled to an output of the DAC and a second current carrying terminal electrically coupled to the input of the ADC. The impedance element can include a resistor and a capacitor, which are electrically connected in parallel. A gain device, such as a programmable multiplier, may also be provided, which has an input responsive to the signal generated at the output of the ADC and an output electrically coupled to the input of the DAC.