PLL Monitoring Circuit for Divider Error and Jitter Correction
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Solution Overview
Problem
Current phase locked loop (PLL) monitoring circuits lack efficient mechanisms to monitor and correct signal errors caused by dividers, leading to potential phase locking failures and signal jitter issues.
Innovation Solution
A monitoring circuit and method that include multiple dividing monitoring circuits to detect errors based on dividing ratios and a jitter monitoring circuit to correct jitter errors, allowing for real-time adjustment of divider ratios and signal frequencies to maintain phase lock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple dividing monitoring circuits are added to monitor each divider, then signal error detection capability is improved, but device complexity increases
Solution Approach 1:
The monitoring system is segmented into multiple independent dividing monitoring circuits, each responsible for monitoring a specific divider. This allows precise error detection for each divider while keeping each monitoring circuit relatively simple in structure, resolving the contradiction between detection capability and device complexity.
Solution Approach 2:
Each dividing monitoring circuit is designed with universal functionality to monitor dividing ratios and detect errors. This standardized approach allows the system to achieve comprehensive monitoring coverage without proportionally increasing complexity, as each circuit performs the same core functions.
2Stability of the object's composition
If a jitter monitoring circuit is added to correct jitter errors, then signal stability is improved, but device complexity increases
Solution Approach 1:
The jitter monitoring circuit implements feedback mechanisms to detect and correct jitter errors in real-time. By continuously monitoring signal jitter and applying corrective actions, the system improves signal stability while the feedback-based approach ensures that complexity is justified by the active correction capability.
Solution Approach 2:
The jitter monitoring circuit performs preliminary detection and correction of jitter errors before they propagate through the PLL system. This proactive approach prevents signal degradation and maintains stability, with the added complexity being concentrated in the monitoring and correction functions rather than throughout the entire system.
3Reliability
If real-time monitoring of dividing ratios is implemented, then phase locking reliability is improved, but measurement and detection difficulty increases
Solution Approach 1:
The dividing monitoring circuits are designed to automatically monitor and detect dividing ratio errors without requiring complex external measurement systems. Each circuit self-services by comparing the actual dividing ratio against expected values and generating error signals, thereby improving phase locking reliability while keeping the detection mechanism relatively simple and integrated within the PLL structure.
Data Source
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AI summary
A monitoring circuit for a high frequency signal includes: a phase locked loop configured to generate a divided output signal with respect to an input signal based on a plurality of dividers; a plurality of dividing monitoring circuits configured to receive dividing input signals and dividing output signals respectively corresponding to the plurality of dividers, and output dividing error signals; and a jitter monitoring circuit configured to output a jitter error signal.