Dual-Regulator PLL/DLL Circuit for Power Supply Noise Rejection
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Solution Overview
Problem
Conventional phase-locked loops (PLLs) and delay-locked loops (DLLs) suffer from power supply noise rejection issues, which introduce jitter into the output signal due to variations in power supply voltage, affecting the stability of the phase and frequency lock.
Innovation Solution
The implementation of a phase control circuit with two regulators: a first regulator for filtering power supply noise and a second regulator for adjusting the phase and frequency lock, using a signal generator to produce a periodic output signal with parameters dependent on a phase adjust voltage, and a low pass filter to isolate noise from the power supply voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional PLL or DLL uses a single regulator for power supply, then the device complexity is low, but power supply noise varies the phase of the output signal, introducing jitter
Solution Approach 1:
The power supply regulation function is segmented into two independent regulators: a first regulator that provides noise-free power to the phase detector and loop filter, and a second regulator that provides noise-free power to the VCO or VCDL. This segmentation isolates noise-sensitive components from power supply variations, resolving the contradiction between maintaining phase stability and avoiding increased device complexity.
Solution Approach 2:
The patent introduces intermediate filtering stages between the power supply and sensitive components. A low-pass filter is inserted between the first regulator and the phase detector/loop filter, and another low-pass filter is placed between the second regulator and the VCO/VCDL. These intermediary filters act as mediators that further attenuate power supply noise before it reaches the sensitive components, enhancing phase stability without requiring complex regulator designs.
2Reliability
If power supply noise is rejected using traditional filtering methods, then phase stability improves, but the circuit complexity and power consumption increase
Solution Approach 1:
The patent changes the power supply parameters by providing separate regulated voltage rails with different noise characteristics to different parts of the circuit. The first regulator maintains a stable average voltage for the phase detector and loop filter, while the second regulator provides a stable average voltage for the VCO or VCDL. This parameter separation allows each component to operate in its optimal voltage environment, improving phase lock stability without requiring excessive filtering that would increase power consumption.
3Reliability
If the power supply voltage is stabilized, then jitter is reduced, but the ability to dynamically adjust phase and frequency response is limited
Solution Approach 1:
The patent implements dynamic control by allowing the second regulator to respond to control signals that depend on phase differences between the output signal and reference signal. This enables the VCO or VCDL to dynamically adjust its operating point in response to phase errors while the first regulator maintains a stable average power supply voltage. The dynamic response capability is preserved in the phase control path while power supply noise rejection is maintained through the dual-regulator architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively rejects power supply noise, maintaining the stability of the phase and frequency lock in PLLs and DLLs, reducing jitter and ensuring reliable operation.
Implementation Method 1
The first regulator is to filter noise in a power supply voltage between the first and second power supply terminals away from the signal generator
Implementation Method 2
The second regulator is to adjust the phase adjust voltage in response to a control signal, the control signal being dependent on a phase difference between the output signal and a reference signal
Implementation Method 3
using a signal generator to produce a periodic output signal with parameters dependent on a phase adjust voltage, and a low pass filter to isolate noise from the power supply voltage
Data Source
AI summary
A phase controller can be part of a phase-locked loop (PLL) or a delay-locked loop (DLL). The phase controller includes first and second regulators. The first regulator provides power supply noise rejection while the second regulator provides phase and frequency lock.


