PLL Drift Compensation Using Ramp-Controlled VCO Capacitance

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Solution Overview

Problem

Phase-locked loops (PLLs) with voltage-controlled oscillators (VCOs) face challenges in maintaining desired oscillating frequencies due to environmental changes like temperature drift, especially when the gain is small, leading to voltage signal limits being exceeded and potential failure to keep the desired frequency.

Innovation Solution

Incorporating a ramp module within the PLL that includes a detector module and a ramp controller to generate a ramp signal, which adjusts the capacitance of a second capacitor unit to keep the voltage signal within a predetermined range, using a monitor to trigger the ramp controller and generate digital or pulse-stream-based ramp signals to control the capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the VCO gain (Kvco) is kept small to reduce noise sensitivity, then the noise sensitivity is reduced, but the voltage signal exceeds voltage limits when temperature drift is large, causing the PLL to fail to maintain desired frequency

Engineering Contradiction:
Improvenoise sensitivityVSAvoidfrequency maintenance capability
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent segments the capacitance control into two independent parts: a first capacitor unit controlled by the detector module for fine frequency adjustment, and a second capacitor unit controlled by the ramp module for coarse drift compensation. This segmentation allows the system to maintain low Kvco for noise reduction while using the ramp module to prevent voltage limit violations during large temperature drifts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The ramp module acts as an intermediary between the temperature drift and the second capacitor unit. It generates a ramp signal that proactively adjusts the second capacitance in response to detected voltage signal trends, preventing the voltage signal from reaching harmful voltage limits before they occur, thus maintaining reliable frequency control.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Stability of the object's composition

If the voltage signal is increased to compensate for large temperature drift, then the frequency stability is improved, but the voltage signal exceeds the voltage limit, causing the PLL to fail

Engineering Contradiction:
Improvefrequency stabilityVSAvoidvoltage limit violation
Core Design Contradiction:
Stability of the object's compositionVSObject-affected harmful factors

Solution Approach 1:

The ramp module performs preliminary action by proactively adjusting the second capacitance before the voltage signal reaches its harmful limits. The monitor detects when the voltage signal approaches voltage limits and triggers the ramp module to preemptively change the second capacitance value, preventing voltage limit violations before they occur and maintaining frequency stability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the capacitance parameter of the second capacitor unit through the ramp signal to compensate for temperature drift effects. By dynamically adjusting the second capacitance value based on voltage signal monitoring, the system maintains frequency stability while preventing voltage limit violations that would occur with fixed capacitance values.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a ramp module is added to control the second capacitor unit, then the frequency stability under temperature drift is improved, but the device complexity increases

Engineering Contradiction:
Improvefrequency maintenance capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the capacitance control function into two distinct modules: the detector module controlling the first capacitor unit for fine adjustment, and the ramp module controlling the second capacitor unit for coarse drift compensation. This segmentation allows each module to be relatively simple while collectively providing robust frequency maintenance capability under temperature drift.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8421542B2Method and apparatus for drift compensation in PLL
Publication Date: 2013.04.16 MARVELL ASIA PTE LTD
  • US8421542B2 patent drawing
  • US8421542B2 patent drawing
  • US8421542B2 patent drawing

AI summary

Aspects of the disclosure provide a phase-locked loop (PLL). The PLL includes a voltage-controlled oscillator (VCO), a detector module, and a ramp module. The VCO has a first capacitor unit and a second capacitor unit. The VCO is configured to generate an oscillating signal having a frequency based on a first capacitance of the first capacitor unit and a second capacitance of the second capacitor unit. The detector module is configured to generate a voltage signal as a function of the oscillating signal and a reference signal. The voltage signal is used to control the first capacitor unit to stabilize the frequency of the oscillating signal. The ramp module is configured to generate a ramp signal based on the voltage signal. The ramp signal is used to control the second capacitor unit to ramp the second capacitance from a first value to a second value.