PLL Duty Ratio Control Using Half-Cycle Feedback
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Solution Overview
Problem
Phase locked loop (PLL) circuits suffer from significant noise characteristics due to the influence of input signal noise, and existing frequency multiplication methods struggle to precisely achieve a duty ratio of 50%, leading to aggravated phase noise and instability.
Innovation Solution
A duty ratio controlling apparatus comprising a clock control unit, half-cycle generation unit, comparator unit, and control voltage generation unit, which generates a multiplied signal, divides it to create inverse relation signals, compares their pulse widths, and adjusts the delay time to achieve a 50% duty ratio, thereby improving phase noise characteristics and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the frequency of the reference input signal is doubled to reduce in-band noise, then the in-band noise of the PLL circuit decreases, but the phase noise characteristics are aggravated when the multiplication is not precise
Solution Approach 1:
The patent applies preliminary action by adjusting the duty ratio of the reference input signal to exactly 50% before frequency multiplication. The duty ratio adjustment circuit pre-adjusts the signal to ensure that when the frequency is doubled, the phase noise characteristics are not aggravated. This preliminary adjustment of the duty ratio prevents the worsening of phase noise while allowing the in-band noise reduction benefit from frequency doubling.
Solution Approach 2:
The patent changes the duty ratio parameter of the reference input signal from an arbitrary value to precisely 50%. By controlling the duty ratio as a specific parameter, the system enables frequency multiplication without degrading phase noise characteristics. The delay element and logic circuit work together to transform the duty ratio parameter, resolving the contradiction between noise reduction and phase noise stability.
2Object-affected harmful factors
If a multiplier is used to multiply the frequency of the reference input signal, then the in-band noise decreases according to Equation 1, but the multiplication precision is difficult to maintain
Solution Approach 1:
The patent implements feedback by using the divided signal (obtained after frequency multiplication) to adjust and control the duty ratio of the reference input signal. The feedback mechanism ensures that the duty ratio remains precisely at 50%, which is critical for maintaining accurate frequency multiplication. This closed-loop control guarantees multiplication precision while still achieving the in-band noise reduction benefit.
Solution Approach 2:
Before frequency multiplication occurs, the system performs preliminary adjustment of the reference signal's duty ratio to exactly 50%. This preliminary action ensures that the multiplication process starts with optimal conditions, making the frequency multiplication precise and reliable. The delay element and logic circuit establish the correct duty ratio beforehand, preventing precision errors during multiplication.
3Device complexity
If the duty ratio of the reference input signal is not precisely controlled, then the circuit operation is simple, but the phase noise characteristics are aggravated and stability is reduced
Solution Approach 1:
The patent segments the duty ratio control function into distinct components: a delay element that delays the reference signal, and logic circuits (AND/OR gates) that combine the delayed and original signals. This segmentation allows precise duty ratio control through simple, modular components rather than requiring a complex control system. Each component performs a specific function that contributes to achieving the 50% duty ratio precisely.
Solution Approach 2:
The patent changes the duty ratio parameter to a specific value (50%) using simple delay and logic operations. By controlling this single parameter through basic circuit elements rather than complex control mechanisms, the system achieves precise duty ratio control while maintaining circuit simplicity. The delay time and logic operations work together to transform the duty ratio parameter without adding significant complexity.
Data Source
AI summary
Disclosed is an apparatus for controlling a duty ratio of a signal that includes a clock control unit configured to generate a plurality of control signals based on an input signal, a half-cycle generation unit configured to generate a multiplied signal by use of the input signal and a delay signal that is obtained by delaying the input signal based on a delay control voltage, and divide the multiplied signal to generate a first division signal and a second division signal that are in inverse relation to each other, a comparator unit configured to compare a pulse width of the first division signal with a pulse width of the second division signal based on the control signal provided by the clock control unit, and output a delay control signal corresponding to a result of the comparison, and a control voltage generation unit configured to output a delay control voltage.